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arm: Move SYS_FSL_SRDS_* and SYS_HAS_SERDES to Kconfig

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Move these options to Kconfig and clean up existing uses.

Signed-off-by: York Sun <york.sun@nxp.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
master
York Sun 8 years ago
parent fd6381029d
commit f534b8f5fd
12 changed files with 27 additions and 26 deletions
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  1. 11
      arch/arm/cpu/armv7/ls102xa/Kconfig
  2. 16
      arch/arm/cpu/armv8/fsl-layerscape/Kconfig
  3. 5
      arch/arm/include/asm/arch-fsl-layerscape/config.h
  4. 2
      arch/arm/include/asm/arch-ls102xa/config.h
  5. 2
      include/configs/ls1012a_common.h
  6. 2
      include/configs/ls1021aqds.h
  7. 2
      include/configs/ls1021atwr.h
  8. 3
      include/configs/ls1043a_common.h
  9. 2
      include/configs/ls1043aqds.h
  10. 3
      include/configs/ls1046a_common.h
  11. 2
      include/configs/ls1046aqds.h
  12. 3
      include/configs/ls2080a_common.h

11
arch/arm/cpu/armv7/ls102xa/Kconfig
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@ -1,6 +1,8 @@
config ARCH_LS1021A
bool
select SYS_FSL_ERRATUM_A010315
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
menu "LS102xA architecture"
depends on ARCH_LS1021A
@ -23,6 +25,15 @@ config MAX_CPUS
config SYS_FSL_ERRATUM_A010315
bool "Workaround for PCIe erratum A010315"
config SYS_FSL_SRDS_1
bool
config SYS_FSL_SRDS_2
bool
config SYS_HAS_SERDES
bool
config SYS_FSL_IFC_BANK_COUNT
int "Maximum banks of Integrated flash controller"
depends on ARCH_LS1021A

16
arch/arm/cpu/armv8/fsl-layerscape/Kconfig
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@ -14,16 +14,23 @@ config ARCH_LS1046A
bool
select FSL_LSCH2
select SYS_FSL_ERRATUM_A010539
select SYS_FSL_SRDS_2
config ARCH_LS2080A
bool
select FSL_LSCH3
select SYS_FSL_HAS_DP_DDR
select SYS_FSL_SRDS_2
config FSL_LSCH2
bool
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
config FSL_LSCH3
bool
select SYS_FSL_SRDS_1
select SYS_HAS_SERDES
menu "Layerscape architecture"
depends on FSL_LSCH2 || FSL_LSCH3
@ -65,4 +72,13 @@ config SYS_FSL_IFC_BANK_COUNT
config SYS_FSL_HAS_DP_DDR
bool
config SYS_FSL_SRDS_1
bool
config SYS_FSL_SRDS_2
bool
config SYS_HAS_SERDES
bool
endmenu

5
arch/arm/include/asm/arch-fsl-layerscape/config.h
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@ -32,8 +32,6 @@
#ifdef CONFIG_LS2080A
#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1, 4, 4 }
#define SRDS_MAX_LANES 8
#define CONFIG_SYS_FSL_SRDS_1
#define CONFIG_SYS_FSL_SRDS_2
#define CONFIG_SYS_PAGE_SIZE 0x10000
#ifndef L1_CACHE_BYTES
#define L1_CACHE_SHIFT 6
@ -162,8 +160,6 @@
#define CONFIG_SYS_FSL_PEX_LUT_BE
#define CONFIG_SYS_FSL_SEC_BE
#define CONFIG_SYS_FSL_SRDS_1
/* SoC related */
#ifdef CONFIG_LS1043A
#define CONFIG_SYS_FMAN_V3
@ -212,7 +208,6 @@
#define CONFIG_SYS_DDR_BLOCK1_SIZE ((phys_size_t)2 << 30)
#define CONFIG_MAX_MEM_MAPPED CONFIG_SYS_DDR_BLOCK1_SIZE
#define CONFIG_SYS_FSL_SRDS_2
#define CONFIG_SYS_FSL_IFC_BE
#define CONFIG_SYS_FSL_SFP_VER_3_2
#define CONFIG_SYS_FSL_SNVS_LE

2
arch/arm/include/asm/arch-ls102xa/config.h
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@ -120,8 +120,6 @@
#define DCU_LAYER_MAX_NUM 16
#define CONFIG_SYS_FSL_SRDS_1
#ifdef CONFIG_LS102XA
#define CONFIG_SYS_FSL_IFC_BANK_COUNT 8
#define CONFIG_NUM_DDR_CONTROLLERS 1

2
include/configs/ls1012a_common.h
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@ -10,8 +10,6 @@
#define CONFIG_FSL_LAYERSCAPE
#define CONFIG_GICV2
#define CONFIG_SYS_HAS_SERDES
#include <asm/arch/config.h>
#define CONFIG_SYS_NO_FLASH

2
include/configs/ls1021aqds.h
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@ -142,8 +142,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
#define CONFIG_SYS_HAS_SERDES
#define CONFIG_FSL_CAAM /* Enable CAAM */
#if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \

2
include/configs/ls1021atwr.h
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@ -169,8 +169,6 @@
#define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL
#define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE
#define CONFIG_SYS_HAS_SERDES
#define CONFIG_FSL_CAAM /* Enable CAAM */
#if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \

3
include/configs/ls1043a_common.h
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@ -15,9 +15,6 @@
#define CONFIG_GICV2
#include <asm/arch/config.h>
#ifdef CONFIG_SYS_FSL_SRDS_1
#define CONFIG_SYS_HAS_SERDES
#endif
/* Link Definitions */
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)

2
include/configs/ls1043aqds.h
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@ -52,8 +52,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
#define CONFIG_SYS_HAS_SERDES
#ifdef CONFIG_SYS_DPAA_FMAN
#define CONFIG_FMAN_ENET
#define CONFIG_PHYLIB

3
include/configs/ls1046a_common.h
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@ -14,9 +14,6 @@
#define CONFIG_GICV2
#include <asm/arch/config.h>
#ifdef CONFIG_SYS_FSL_SRDS_1
#define CONFIG_SYS_HAS_SERDES
#endif
/* Link Definitions */
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)

2
include/configs/ls1046aqds.h
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@ -49,8 +49,6 @@ unsigned long get_board_ddr_clk(void);
#define CONFIG_MEM_INIT_VALUE 0xdeadbeef
#endif
#define CONFIG_SYS_HAS_SERDES
/* DSPI */
#ifdef CONFIG_FSL_DSPI
#define CONFIG_SPI_FLASH_STMICRO /* cs0 */

3
include/configs/ls2080a_common.h
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@ -15,9 +15,6 @@
#include <asm/arch/ls2080a_stream_id.h>
#include <asm/arch/config.h>
#if (defined(CONFIG_SYS_FSL_SRDS_1) || defined(CONFIG_SYS_FSL_SRDS_2))
#define CONFIG_SYS_HAS_SERDES
#endif
/* Link Definitions */
#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_FSL_OCRAM_BASE + 0xfff0)

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