Whitebox
/
u-boot
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

Stop using immap_t for guts offset on 85xx

Browse Source 
In the future the offsets to various blocks may not be in same location.
Move to using CFG_MPC85xx_GUTS_ADDR as the base of the guts registers
instead of getting it via &immap->im_gur.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
master
Kumar Gala 17 years ago
parent 50c03c8cf4
commit f59b55a5b8
20 changed files with 36 additions and 52 deletions
Show all changes Ignore whitespace when comparing lines Ignore changes in amount of whitespace Ignore changes in whitespace at EOL
Show Stats Download Patch File Download Diff File
  1. 8
      board/cds/mpc8541cds/mpc8541cds.c
  2. 10
      board/cds/mpc8548cds/mpc8548cds.c
  3. 8
      board/cds/mpc8555cds/mpc8555cds.c
  4. 5
      board/freescale/mpc8544ds/mpc8544ds.c
  5. 5
      board/mpc8540ads/mpc8540ads.c
  6. 2
      board/mpc8540eval/mpc8540eval.c
  7. 5
      board/mpc8560ads/mpc8560ads.c
  8. 5
      board/mpc8568mds/mpc8568mds.c
  9. 5
      board/pm854/pm854.c
  10. 5
      board/pm856/pm856.c
  11. 3
      board/sbc8560/sbc8560.c
  12. 3
      board/stxgp3/stxgp3.c
  13. 3
      board/stxssa/stxssa.c
  14. 3
      board/tqm85xx/sdram.c
  15. 2
      board/tqm85xx/tqm85xx.c
  16. 2
      cpu/mpc85xx/pci.c
  17. 4
      cpu/mpc85xx/qe_io.c
  18. 2
      cpu/mpc85xx/spd_sdram.c
  19. 3
      cpu/mpc85xx/speed.c
  20. 5
      include/asm-ppc/immap_85xx.h

8
board/cds/mpc8541cds/mpc8541cds.c
Unescape View File

@ -203,8 +203,7 @@ int board_early_init_f (void)
int checkboard (void)
{
volatile immap_t *immap = (immap_t *) CFG_CCSRBAR;
volatile ccsr_gur_t *gur = &immap->im_gur;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
/* PCI slot in USER bits CSR[6:7] by convention. */
uint pci_slot = get_pci_slot ();
@ -250,7 +249,6 @@ long int
initdram(int board_type)
{
long dram_size = 0;
volatile immap_t *immap = (immap_t *)CFG_IMMR;
puts("Initializing\n");
@ -263,7 +261,7 @@ initdram(int board_type)
* Override DLL = 1, Course Adj = 1, Tap Select = 0
*/
volatile ccsr_gur_t *gur= &immap->im_gur;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
gur->ddrdllcr = 0x81000000;
asm("sync;isync;msync");
@ -294,7 +292,7 @@ void
local_bus_init(void)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile ccsr_gur_t *gur = &immap->im_gur;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
volatile ccsr_lbc_t *lbc = &immap->im_lbc;
uint clkdiv;

10
board/cds/mpc8548cds/mpc8548cds.c
Unescape View File

@ -56,7 +56,7 @@ int board_early_init_f (void)
int checkboard (void)
{
volatile immap_t *immap = (immap_t *) CFG_CCSRBAR;
volatile ccsr_gur_t *gur = &immap->im_gur;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
volatile ccsr_local_ecm_t *ecm = &immap->im_local_ecm;
/* PCI slot in USER bits CSR[6:7] by convention. */
@ -96,7 +96,6 @@ long int
initdram(int board_type)
{
long dram_size = 0;
volatile immap_t *immap = (immap_t *)CFG_IMMR;
puts("Initializing\n");
@ -109,7 +108,7 @@ initdram(int board_type)
* Override DLL = 1, Course Adj = 1, Tap Select = 0
*/
volatile ccsr_gur_t *gur= &immap->im_gur;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
gur->ddrdllcr = 0x81000000;
asm("sync;isync;msync");
@ -140,7 +139,7 @@ void
local_bus_init(void)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile ccsr_gur_t *gur = &immap->im_gur;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
volatile ccsr_lbc_t *lbc = &immap->im_lbc;
uint clkdiv;
@ -330,8 +329,7 @@ int first_free_busno=0;
void
pci_init_board(void)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile ccsr_gur_t *gur = &immap->im_gur;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
uint io_sel = (gur->pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19;
uint host_agent = (gur->porbmsr & MPC85xx_PORBMSR_HA) >> 16;

8
board/cds/mpc8555cds/mpc8555cds.c
Unescape View File

@ -201,8 +201,7 @@ int board_early_init_f (void)
int checkboard (void)
{
volatile immap_t *immap = (immap_t *) CFG_CCSRBAR;
volatile ccsr_gur_t *gur = &immap->im_gur;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
/* PCI slot in USER bits CSR[6:7] by convention. */
uint pci_slot = get_pci_slot ();
@ -248,7 +247,6 @@ long int
initdram(int board_type)
{
long dram_size = 0;
volatile immap_t *immap = (immap_t *)CFG_IMMR;
puts("Initializing\n");
@ -261,7 +259,7 @@ initdram(int board_type)
* Override DLL = 1, Course Adj = 1, Tap Select = 0
*/
volatile ccsr_gur_t *gur= &immap->im_gur;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
gur->ddrdllcr = 0x81000000;
asm("sync;isync;msync");
@ -292,7 +290,7 @@ void
local_bus_init(void)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile ccsr_gur_t *gur = &immap->im_gur;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
volatile ccsr_lbc_t *lbc = &immap->im_lbc;
uint clkdiv;

5
board/freescale/mpc8544ds/mpc8544ds.c
Unescape View File

@ -50,7 +50,7 @@ int board_early_init_f (void)
int checkboard (void)
{
volatile immap_t *immap = (immap_t *) CFG_CCSRBAR;
volatile ccsr_gur_t *gur = &immap->im_gur;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
volatile ccsr_lbc_t *lbc = &immap->im_lbc;
volatile ccsr_local_ecm_t *ecm = &immap->im_local_ecm;
@ -146,8 +146,7 @@ int first_free_busno=0;
void
pci_init_board(void)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile ccsr_gur_t *gur = &immap->im_gur;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
uint devdisr = gur->devdisr;
uint io_sel = (gur->pordevsr & MPC85xx_PORDEVSR_IO_SEL) >> 19;
uint host_agent = (gur->porbmsr & MPC85xx_PORBMSR_HA) >> 16;

5
board/mpc8540ads/mpc8540ads.c
Unescape View File

@ -77,13 +77,12 @@ initdram(int board_type)
{
long dram_size = 0;
extern long spd_sdram (void);
volatile immap_t *immap = (immap_t *)CFG_IMMR;
puts("Initializing\n");
#if defined(CONFIG_DDR_DLL)
{
volatile ccsr_gur_t *gur= &immap->im_gur;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
uint temp_ddrdll = 0;
/*
@ -126,7 +125,7 @@ void
local_bus_init(void)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile ccsr_gur_t *gur = &immap->im_gur;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
volatile ccsr_lbc_t *lbc = &immap->im_lbc;
uint clkdiv;

2
board/mpc8540eval/mpc8540eval.c
Unescape View File

@ -75,7 +75,7 @@ long int initdram (int board_type)
uint temp_lbcdll = 0;
#endif
#if !defined(CONFIG_RAM_AS_FLASH) || defined(CONFIG_DDR_DLL)
volatile ccsr_gur_t *gur= &immap->im_gur;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
#endif
#if defined(CONFIG_DDR_DLL)

5
board/mpc8560ads/mpc8560ads.c
Unescape View File

@ -278,13 +278,12 @@ initdram(int board_type)
{
long dram_size = 0;
extern long spd_sdram (void);
volatile immap_t *immap = (immap_t *)CFG_IMMR;
puts("Initializing\n");
#if defined(CONFIG_DDR_DLL)
{
volatile ccsr_gur_t *gur= &immap->im_gur;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
uint temp_ddrdll = 0;
/*
@ -327,7 +326,7 @@ void
local_bus_init(void)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile ccsr_gur_t *gur = &immap->im_gur;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
volatile ccsr_lbc_t *lbc = &immap->im_lbc;
uint clkdiv;

5
board/mpc8568mds/mpc8568mds.c
Unescape View File

@ -133,7 +133,6 @@ long int
initdram(int board_type)
{
long dram_size = 0;
volatile immap_t *immap = (immap_t *)CFG_IMMR;
puts("Initializing\n");
@ -146,7 +145,7 @@ initdram(int board_type)
* Override DLL = 1, Course Adj = 1, Tap Select = 0
*/
volatile ccsr_gur_t *gur= &immap->im_gur;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
gur->ddrdllcr = 0x81000000;
asm("sync;isync;msync");
@ -177,7 +176,7 @@ void
local_bus_init(void)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile ccsr_gur_t *gur = &immap->im_gur;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
volatile ccsr_lbc_t *lbc = &immap->im_lbc;
uint clkdiv;

5
board/pm854/pm854.c
Unescape View File

@ -79,13 +79,12 @@ initdram(int board_type)
{
long dram_size = 0;
extern long spd_sdram (void);
volatile immap_t *immap = (immap_t *)CFG_IMMR;
puts("Initializing\n");
#if defined(CONFIG_DDR_DLL)
{
volatile ccsr_gur_t *gur= &immap->im_gur;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
int i,x;
x = 10;
@ -134,7 +133,7 @@ void
local_bus_init(void)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile ccsr_gur_t *gur = &immap->im_gur;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
volatile ccsr_lbc_t *lbc = &immap->im_lbc;
uint clkdiv;

5
board/pm856/pm856.c
Unescape View File

@ -232,13 +232,12 @@ initdram(int board_type)
{
long dram_size = 0;
extern long spd_sdram (void);
volatile immap_t *immap = (immap_t *)CFG_IMMR;
puts("Initializing\n");
#if defined(CONFIG_DDR_DLL)
{
volatile ccsr_gur_t *gur= &immap->im_gur;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
int i,x;
x = 10;
@ -288,7 +287,7 @@ void
local_bus_init(void)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile ccsr_gur_t *gur = &immap->im_gur;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
volatile ccsr_lbc_t *lbc = &immap->im_lbc;
uint clkdiv;

3
board/sbc8560/sbc8560.c
Unescape View File

@ -264,7 +264,6 @@ long int initdram (int board_type)
{
long dram_size = 0;
extern long spd_sdram (void);
volatile immap_t *immap = (immap_t *)CFG_IMMR;
#if 0
#if !defined(CONFIG_RAM_AS_FLASH)
volatile ccsr_lbc_t *lbc= &immap->im_lbc;
@ -273,7 +272,7 @@ long int initdram (int board_type)
#endif
#endif /* 0 */
#if !defined(CONFIG_RAM_AS_FLASH) || defined(CONFIG_DDR_DLL)
volatile ccsr_gur_t *gur= &immap->im_gur;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
#endif
#if defined(CONFIG_DDR_DLL)
uint temp_ddrdll = 0;

3
board/stxgp3/stxgp3.c
Unescape View File

@ -283,11 +283,10 @@ initdram (int board_type)
{
long dram_size = 0;
extern long spd_sdram (void);
volatile immap_t *immap = (immap_t *)CFG_IMMR;
#if defined(CONFIG_DDR_DLL)
{
volatile ccsr_gur_t *gur= &immap->im_gur;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
uint temp_ddrdll = 0;
/* Work around to stabilize DDR DLL */

3
board/stxssa/stxssa.c
Unescape View File

@ -302,8 +302,7 @@ initdram (int board_type)
#if defined(CONFIG_DDR_DLL)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile ccsr_gur_t *gur= &immap->im_gur;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
uint temp_ddrdll = 0;
/* Work around to stabilize DDR DLL */

3
board/tqm85xx/sdram.c
Unescape View File

@ -150,8 +150,7 @@ long int initdram (int board_type)
* This DLL-Override only used on TQM8540 and TQM8560
*/
{
volatile immap_t *immap = (immap_t *) CFG_IMMR;
volatile ccsr_gur_t *gur= &immap->im_gur;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
int i,x;
x = 10;

2
board/tqm85xx/tqm85xx.c
Unescape View File

@ -325,7 +325,7 @@ int misc_init_r (void)
void local_bus_init (void)
{
volatile immap_t *immap = (immap_t *) CFG_IMMR;
volatile ccsr_gur_t *gur = &immap->im_gur;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
volatile ccsr_lbc_t *lbc = &immap->im_lbc;
uint clkdiv;

2
cpu/mpc85xx/pci.c
Unescape View File

@ -48,7 +48,7 @@ pci_mpc85xx_init(struct pci_controller *board_hose)
#ifdef CONFIG_MPC85XX_PCI2
volatile ccsr_pcix_t *pcix2 = &immap->im_pcix2;
#endif
volatile ccsr_gur_t *gur = &immap->im_gur;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
struct pci_controller * hose;
pci_hose = board_hose;

4
cpu/mpc85xx/qe_io.c
Unescape View File

@ -34,9 +34,9 @@ void qe_config_iopin(u8 port, u8 pin, int dir, int open_drain, int assign)
u32 pin_2bit_assign;
u32 pin_1bit_mask;
u32 tmp_val;
volatile immap_t *im = (volatile immap_t *)CFG_IMMR;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
volatile par_io_t *par_io = (volatile par_io_t *)
&(im->im_gur.qe_par_io);
&(gur->qe_par_io);
/* Caculate pin location and 2bit mask and dir */
pin_2bit_mask = (u32)(0x3 << (NUM_OF_PINS-(pin%(NUM_OF_PINS/2)+1)*2));

2
cpu/mpc85xx/spd_sdram.c
Unescape View File

@ -309,7 +309,7 @@ spd_sdram(void)
if ((SVR_VER(get_svr()) == SVR_8548_E) &&
(SVR_MJREV(get_svr()) == 1) &&
(spd.mem_type == SPD_MEMTYPE_DDR2)) {
volatile ccsr_gur_t *gur = &immap->im_gur;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
gur->ddrioovcr = (0x80000000 /* Enable */
| 0x10000000);/* VSEL to 1.8V */
}

3
cpu/mpc85xx/speed.c
Unescape View File

@ -35,8 +35,7 @@ DECLARE_GLOBAL_DATA_PTR;
void get_sys_info (sys_info_t * sysInfo)
{
volatile immap_t *immap = (immap_t *)CFG_IMMR;
volatile ccsr_gur_t *gur = &immap->im_gur;
volatile ccsr_gur_t *gur = (void *)(CFG_MPC85xx_GUTS_ADDR);
uint plat_ratio,e500_ratio,half_freqSystemBus;
plat_ratio = (gur->porpllsr) & 0x0000003e;

5
include/asm-ppc/immap_85xx.h
Unescape View File

@ -1617,6 +1617,9 @@ typedef struct ccsr_gur {
char res15[61648]; /* 0xe0f30 to 0xefffff */
} ccsr_gur_t;
#define CFG_MPC85xx_GUTS_OFFSET (0xE0000)
#define CFG_MPC85xx_GUTS_ADDR (CFG_IMMR + CFG_MPC85xx_GUTS_OFFSET)
#define PORDEVSR_PCI (0x00800000) /* PCI Mode */
typedef struct immap {
@ -1634,8 +1637,6 @@ typedef struct immap {
ccsr_tsec_t im_tsec2;
ccsr_pic_t im_pic;
ccsr_cpm_t im_cpm;
ccsr_rio_t im_rio;
ccsr_gur_t im_gur;
} immap_t;
extern immap_t *immr;

Write Preview
Loading…
Cancel
Save