Remove board support for afeb9260, tny_a9260, and sbc35_a9g20. They have not been converted into Generic Board yet. See doc/README.generic-board for details. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Sergey Lapin <slapin@ossfans.org> Cc: Albin Tonnerre <albin.tonnerre@free-electrons.com> Cc: Andreas Bießmann <andreas.devel@googlemail.com>master
Masahiro Yamada
10 years ago
committed by
Andreas Bießmann
parent
bd328eb382
commit
f6b42c1403
@ -1,9 +0,0 @@ |
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if TARGET_AFEB9260 |
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config SYS_BOARD |
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default "afeb9260" |
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config SYS_CONFIG_NAME |
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default "afeb9260" |
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endif |
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@ -1,6 +0,0 @@ |
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AFEB9260 BOARD |
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M: Sergey Lapin <slapin@ossfans.org> |
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S: Maintained |
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F: board/afeb9260/ |
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F: include/configs/afeb9260.h |
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F: configs/afeb9260_defconfig |
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@ -1,13 +0,0 @@ |
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#
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# (C) Copyright 2003-2008
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# (C) Copyright 2008
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# Stelian Pop <stelian@popies.net>
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# Lead Tech Design <www.leadtechdesign.com>
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y += afeb9260.o
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obj-y += partition.o
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@ -1,159 +0,0 @@ |
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/*
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* (C) Copyright 2007-2008 |
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* Stelian Pop <stelian@popies.net> |
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* Lead Tech Design <www.leadtechdesign.com> |
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* (C) Copyright 2008 Sergey Lapin <slapin@ossfans.org> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <asm/arch/at91sam9260.h> |
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#include <asm/arch/at91sam9260_matrix.h> |
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#include <asm/arch/at91sam9_smc.h> |
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#include <asm/arch/at91_common.h> |
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#include <asm/arch/at91_pmc.h> |
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#include <asm/arch/gpio.h> |
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#include <asm/io.h> |
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#include <asm/arch/hardware.h> |
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#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) |
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#include <netdev.h> |
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#include <net.h> |
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#endif |
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DECLARE_GLOBAL_DATA_PTR; |
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/* ------------------------------------------------------------------------- */ |
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/*
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* Miscelaneous platform dependent initialisations |
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*/ |
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static void afeb9260_nand_hw_init(void) |
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{ |
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unsigned long csa; |
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struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; |
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struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; |
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/* Assign CS3 to NAND/SmartMedia Interface */ |
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csa = readl(&matrix->ebicsa); |
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csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA; |
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writel(csa, &matrix->ebicsa); |
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|
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/* Configure SMC CS3 for NAND/SmartMedia */ |
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writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) | |
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AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0), |
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&smc->cs[3].setup); |
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writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) | |
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AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3), |
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&smc->cs[3].pulse); |
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writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5), |
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&smc->cs[3].cycle); |
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writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | |
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AT91_SMC_MODE_EXNW_DISABLE | |
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AT91_SMC_MODE_DBW_8 | |
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AT91_SMC_MODE_TDF_CYCLE(2), |
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&smc->cs[3].mode); |
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|
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/* Configure RDY/BSY */ |
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at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); |
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/* Enable NandFlash */ |
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at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); |
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} |
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#ifdef CONFIG_MACB |
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static void afeb9260_macb_hw_init(void) |
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{ |
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struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; |
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struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA; |
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/* Enable EMAC clock */ |
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writel(1 << ATMEL_ID_EMAC0, &pmc->pcer); |
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/*
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* Disable pull-up on: |
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* RXDV (PA17) => PHY normal mode (not Test mode) |
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* ERX0 (PA14) => PHY ADDR0 |
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* ERX1 (PA15) => PHY ADDR1 |
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* ERX2 (PA25) => PHY ADDR2 |
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* ERX3 (PA26) => PHY ADDR3 |
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* ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0 |
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* |
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* PHY has internal pull-down |
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*/ |
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writel(pin_to_mask(AT91_PIN_PA14) | |
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pin_to_mask(AT91_PIN_PA15) | |
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pin_to_mask(AT91_PIN_PA17) | |
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pin_to_mask(AT91_PIN_PA25) | |
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pin_to_mask(AT91_PIN_PA26) | |
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pin_to_mask(AT91_PIN_PA28), |
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&pioa->pudr); |
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at91_phy_reset(); |
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/* Re-enable pull-up */ |
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writel(pin_to_mask(AT91_PIN_PA14) | |
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pin_to_mask(AT91_PIN_PA15) | |
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pin_to_mask(AT91_PIN_PA17) | |
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pin_to_mask(AT91_PIN_PA25) | |
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pin_to_mask(AT91_PIN_PA26) | |
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pin_to_mask(AT91_PIN_PA28), |
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&pioa->puer); |
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at91_macb_hw_init(); |
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} |
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#endif |
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int board_early_init_f(void) |
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{ |
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struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; |
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/* Enable clocks for all PIOs */ |
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writel((1 << ATMEL_ID_PIOA) | |
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(1 << ATMEL_ID_PIOB) | |
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(1 << ATMEL_ID_PIOC), |
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&pmc->pcer); |
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return 0; |
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} |
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int board_init(void) |
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{ |
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/* arch number of AT91SAM9260EK-Board */ |
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gd->bd->bi_arch_number = MACH_TYPE_AFEB9260; |
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/* adress of boot parameters */ |
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; |
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at91_seriald_hw_init(); |
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#ifdef CONFIG_CMD_NAND |
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afeb9260_nand_hw_init(); |
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#endif |
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at91_spi0_hw_init((1 << 0) | (1 << 1)); |
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#ifdef CONFIG_MACB |
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afeb9260_macb_hw_init(); |
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#endif |
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return 0; |
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} |
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int dram_init(void) |
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{ |
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gd->ram_size = get_ram_size( |
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(void *)CONFIG_SYS_SDRAM_BASE, |
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CONFIG_SYS_SDRAM_SIZE); |
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return 0; |
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} |
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#ifdef CONFIG_RESET_PHY_R |
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void reset_phy(void) |
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{ |
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} |
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#endif |
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int board_eth_init(bd_t *bis) |
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{ |
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int rc = 0; |
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#ifdef CONFIG_MACB |
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rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x01); |
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#endif |
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return rc; |
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} |
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@ -1 +0,0 @@ |
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CONFIG_SYS_TEXT_BASE = 0x21f00000
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@ -1,21 +0,0 @@ |
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/*
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <config.h> |
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#include <asm/hardware.h> |
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#include <dataflash.h> |
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AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS]; |
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struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = { |
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{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0}, /* Logical adress, CS */ |
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{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1, 1} |
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}; |
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/*define the area offsets*/ |
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dataflash_protect_t area_list[NB_DATAFLASH_AREA] = { |
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{0x00000000, 0x000041FF, FLAG_PROTECT_CLEAR, 0, "Bootstrap"}, |
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{0x00004200, 0x000083FF, FLAG_PROTECT_CLEAR, 0, "Environment"}, |
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{0x00008400, 0x00041FFF, FLAG_PROTECT_CLEAR, 0, "U-Boot"}, |
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}; |
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@ -1,12 +0,0 @@ |
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if TARGET_SBC35_A9G20 |
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config SYS_BOARD |
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default "sbc35_a9g20" |
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config SYS_VENDOR |
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default "calao" |
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config SYS_CONFIG_NAME |
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default "sbc35_a9g20" |
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endif |
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@ -1,7 +0,0 @@ |
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SBC35_A9G20 BOARD |
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#M: Albin Tonnerre <albin.tonnerre@free-electrons.com> |
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S: Orphan (since 2014-06) |
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F: board/calao/sbc35_a9g20/ |
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F: include/configs/sbc35_a9g20.h |
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F: configs/sbc35_a9g20_eeprom_defconfig |
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F: configs/sbc35_a9g20_nandflash_defconfig |
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@ -1,13 +0,0 @@ |
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#
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# (C) Copyright 2003-2008
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# (C) Copyright 2008
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# Stelian Pop <stelian@popies.net>
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# Lead Tech Design <www.leadtechdesign.com>
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#
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# SPDX-License-Identifier: GPL-2.0+
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#
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obj-y += sbc35_a9g20.o
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obj-$(CONFIG_ATMEL_SPI) += spi.o
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@ -1 +0,0 @@ |
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CONFIG_SYS_TEXT_BASE = 0x23f00000
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@ -1,155 +0,0 @@ |
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/*
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* (C) Copyright 2007-2008 |
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* Stelian Pop <stelian@popies.net> |
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* Lead Tech Design <www.leadtechdesign.com> |
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* |
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* Copyright (C) 2009 |
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* Albin Tonnerre, Free-Electrons <albin.tonnerre@free-electrons.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <asm/io.h> |
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#include <asm/arch/at91sam9260_matrix.h> |
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#include <asm/arch/at91sam9_smc.h> |
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#include <asm/arch/at91_common.h> |
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#include <asm/arch/at91_pmc.h> |
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#include <asm/arch/gpio.h> |
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#if defined(CONFIG_RESET_PHY_R) && defined(CONFIG_MACB) |
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#include <net.h> |
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#endif |
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#include <netdev.h> |
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DECLARE_GLOBAL_DATA_PTR; |
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/* ------------------------------------------------------------------------- */ |
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/*
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* Miscelaneous platform dependent initialisations |
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*/ |
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#ifdef CONFIG_CMD_NAND |
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static void sbc35_a9g20_nand_hw_init(void) |
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{ |
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struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; |
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struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; |
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struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; |
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unsigned long csa; |
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/* Enable CS3 */ |
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csa = readl(&matrix->ebicsa); |
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csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA; |
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writel(csa, &matrix->ebicsa); |
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/* Configure SMC CS3 for NAND/SmartMedia */ |
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writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) | |
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AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0), |
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&smc->cs[3].setup); |
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writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) | |
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AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3), |
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&smc->cs[3].pulse); |
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writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5), |
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&smc->cs[3].cycle); |
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writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | |
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AT91_SMC_MODE_EXNW_DISABLE | |
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#ifdef CONFIG_SYS_NAND_DBW_16 |
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AT91_SMC_MODE_DBW_16 | |
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#else /* CONFIG_SYS_NAND_DBW_8 */ |
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AT91_SMC_MODE_DBW_8 | |
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#endif |
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AT91_SMC_MODE_TDF_CYCLE(2), |
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&smc->cs[3].mode); |
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writel(1 << ATMEL_ID_PIOC, &pmc->pcer); |
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/* Configure RDY/BSY */ |
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at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); |
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/* Enable NandFlash */ |
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at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); |
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} |
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#endif |
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#ifdef CONFIG_MACB |
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static void sbc35_a9g20_macb_hw_init(void) |
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{ |
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struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; |
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struct at91_port *pioa = (struct at91_port *)ATMEL_BASE_PIOA; |
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/* Enable EMAC clock */ |
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writel(1 << ATMEL_ID_EMAC0, &pmc->pcer); |
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/*
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* Disable pull-up on: |
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* RXDV (PA17) => PHY normal mode (not Test mode) |
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* ERX0 (PA14) => PHY ADDR0 |
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* ERX1 (PA15) => PHY ADDR1 |
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* ERX2 (PA25) => PHY ADDR2 |
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* ERX3 (PA26) => PHY ADDR3 |
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* ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0 |
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* |
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* PHY has internal pull-down |
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*/ |
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writel(pin_to_mask(AT91_PIN_PA14) | |
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pin_to_mask(AT91_PIN_PA15) | |
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pin_to_mask(AT91_PIN_PA17) | |
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pin_to_mask(AT91_PIN_PA25) | |
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pin_to_mask(AT91_PIN_PA26) | |
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pin_to_mask(AT91_PIN_PA28), |
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&pioa->pudr); |
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at91_phy_reset(); |
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/* Re-enable pull-up */ |
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writel(pin_to_mask(AT91_PIN_PA14) | |
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pin_to_mask(AT91_PIN_PA15) | |
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pin_to_mask(AT91_PIN_PA17) | |
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pin_to_mask(AT91_PIN_PA25) | |
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pin_to_mask(AT91_PIN_PA26) | |
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pin_to_mask(AT91_PIN_PA28), |
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&pioa->puer); |
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at91_macb_hw_init(); |
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} |
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#endif |
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int board_init(void) |
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{ |
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/* adress of boot parameters */ |
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; |
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at91_seriald_hw_init(); |
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sbc35_a9g20_nand_hw_init(); |
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#ifdef CONFIG_ATMEL_SPI |
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at91_spi0_hw_init(1 << 4 | 1 << 5); |
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#endif |
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#ifdef CONFIG_MACB |
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sbc35_a9g20_macb_hw_init(); |
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#endif |
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return 0; |
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} |
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int dram_init(void) |
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{ |
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gd->ram_size = get_ram_size( |
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(void *)CONFIG_SYS_SDRAM_BASE, |
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CONFIG_SYS_SDRAM_SIZE); |
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return 0; |
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} |
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#ifdef CONFIG_RESET_PHY_R |
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void reset_phy(void) |
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{ |
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} |
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#endif |
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int board_eth_init(bd_t *bis) |
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{ |
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int rc = 0; |
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#ifdef CONFIG_MACB |
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rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00); |
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#endif |
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return rc; |
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} |
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@ -1,41 +0,0 @@ |
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/*
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* Copyright (C) 2009 |
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* Albin Tonnerre, Free Electrons <albin.tonnerre@free-electrons.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <asm/arch/hardware.h> |
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#include <asm/arch/at91_spi.h> |
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#include <asm/arch/gpio.h> |
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#include <spi.h> |
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#define SBC_A9260_CS0_PIN AT91_PIN_PA3 |
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#define SBC_A9260_CS1_PIN AT91_PIN_PC11 |
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int spi_cs_is_valid(unsigned int bus, unsigned int cs) |
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{ |
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return bus == 0 && (cs == 1 || cs == 0); |
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} |
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void spi_cs_activate(struct spi_slave *slave) |
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{ |
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if(slave->cs == 0) |
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at91_set_gpio_value(SBC_A9260_CS0_PIN, 0); |
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else if(slave->cs == 1) |
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at91_set_gpio_value(SBC_A9260_CS1_PIN, 0); |
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} |
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void spi_cs_deactivate(struct spi_slave *slave) |
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{ |
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if(slave->cs == 0) |
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at91_set_gpio_value(SBC_A9260_CS0_PIN, 1); |
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else if(slave->cs == 1) |
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at91_set_gpio_value(SBC_A9260_CS1_PIN, 1); |
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} |
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void spi_init_f(void) |
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{ |
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/* everything done in board_init */ |
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} |
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@ -1,12 +0,0 @@ |
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if TARGET_TNY_A9260 |
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config SYS_BOARD |
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default "tny_a9260" |
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config SYS_VENDOR |
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default "calao" |
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config SYS_CONFIG_NAME |
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default "tny_a9260" |
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endif |
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@ -1,9 +0,0 @@ |
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TNY_A9260 BOARD |
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#M: Albin Tonnerre <albin.tonnerre@free-electrons.com> |
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S: Orphan (since 2014-06) |
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F: board/calao/tny_a9260/ |
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F: include/configs/tny_a9260.h |
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F: configs/tny_a9260_eeprom_defconfig |
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F: configs/tny_a9260_nandflash_defconfig |
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F: configs/tny_a9g20_eeprom_defconfig |
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F: configs/tny_a9g20_nandflash_defconfig |
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@ -1,13 +0,0 @@ |
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#
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# (C) Copyright 2003-2008
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# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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#
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# (C) Copyright 2008
|
||||
# Stelian Pop <stelian@popies.net>
|
||||
# Lead Tech Design <www.leadtechdesign.com>
|
||||
#
|
||||
# SPDX-License-Identifier: GPL-2.0+
|
||||
#
|
||||
|
||||
obj-y += tny_a9260.o
|
||||
obj-$(CONFIG_ATMEL_SPI) += spi.o
|
||||
@ -1 +0,0 @@ |
||||
CONFIG_SYS_TEXT_BASE = 0x23f00000
|
||||
@ -1,34 +0,0 @@ |
||||
/*
|
||||
* Copyright (C) 2009 |
||||
* Albin Tonnerre, Free Electrons <albin.tonnerre@free-electrons.com> |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <asm/arch/hardware.h> |
||||
#include <asm/arch/at91_spi.h> |
||||
#include <asm/arch/gpio.h> |
||||
#include <spi.h> |
||||
|
||||
#define TNY_A9260_CS_PIN AT91_PIN_PC11 |
||||
|
||||
int spi_cs_is_valid(unsigned int bus, unsigned int cs) |
||||
{ |
||||
return bus == 0 && cs == 1; |
||||
} |
||||
|
||||
void spi_cs_activate(struct spi_slave *slave) |
||||
{ |
||||
at91_set_gpio_value(TNY_A9260_CS_PIN, 0); |
||||
} |
||||
|
||||
void spi_cs_deactivate(struct spi_slave *slave) |
||||
{ |
||||
at91_set_gpio_value(TNY_A9260_CS_PIN, 1); |
||||
} |
||||
|
||||
void spi_init_f(void) |
||||
{ |
||||
/* everything done in board_init */ |
||||
} |
||||
@ -1,85 +0,0 @@ |
||||
/*
|
||||
* (C) Copyright 2007-2008 |
||||
* Stelian Pop <stelian@popies.net> |
||||
* Lead Tech Design <www.leadtechdesign.com> |
||||
* |
||||
* Copyright (C) 2009 |
||||
* Albin Tonnerre, Free Electrons <albin.tonnerre@free-electrons.com> |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <asm/arch/at91sam9_matrix.h> |
||||
#include <asm/arch/at91sam9_smc.h> |
||||
#include <asm/arch/at91_common.h> |
||||
#include <asm/arch/at91_pmc.h> |
||||
#include <asm/arch/at91_rstc.h> |
||||
#include <asm/arch/gpio.h> |
||||
#include <asm/arch/hardware.h> |
||||
|
||||
DECLARE_GLOBAL_DATA_PTR; |
||||
|
||||
/* ------------------------------------------------------------------------- */ |
||||
/*
|
||||
* Miscelaneous platform dependent initialisations |
||||
*/ |
||||
|
||||
static void tny_a9260_nand_hw_init(void) |
||||
{ |
||||
struct at91_pmc *pmc = (struct at91_pmc *)ATMEL_BASE_PMC; |
||||
struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC; |
||||
struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX; |
||||
unsigned long csa; |
||||
|
||||
/* Assign CS3 to NAND/SmartMedia Interface */ |
||||
csa = readl(&matrix->ebicsa); |
||||
csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA; |
||||
writel(csa, &matrix->ebicsa); |
||||
|
||||
/* Configure SMC CS3 for NAND/SmartMedia */ |
||||
writel(AT91_SMC_SETUP_NWE(1) | AT91_SMC_SETUP_NCS_WR(0) | |
||||
AT91_SMC_SETUP_NRD(1) | AT91_SMC_SETUP_NCS_RD(0), |
||||
&smc->cs[3].setup); |
||||
writel(AT91_SMC_PULSE_NWE(3) | AT91_SMC_PULSE_NCS_WR(3) | |
||||
AT91_SMC_PULSE_NRD(3) | AT91_SMC_PULSE_NCS_RD(3), |
||||
&smc->cs[3].pulse); |
||||
writel(AT91_SMC_CYCLE_NWE(5) | AT91_SMC_CYCLE_NRD(5), |
||||
&smc->cs[3].cycle); |
||||
writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE | |
||||
AT91_SMC_MODE_EXNW_DISABLE | |
||||
#ifdef CONFIG_SYS_NAND_DBW_16 |
||||
AT91_SMC_MODE_DBW_16 | |
||||
#else /* CONFIG_SYS_NAND_DBW_8 */ |
||||
AT91_SMC_MODE_DBW_8 | |
||||
#endif |
||||
AT91_SMC_MODE_TDF_CYCLE(2), |
||||
&smc->cs[3].mode); |
||||
|
||||
writel(1 << ATMEL_ID_PIOC, &pmc->pcer); |
||||
|
||||
/* Configure RDY/BSY */ |
||||
at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1); |
||||
|
||||
/* Enable NandFlash */ |
||||
at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1); |
||||
} |
||||
|
||||
int board_init(void) |
||||
{ |
||||
/* adress of boot parameters */ |
||||
gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100; |
||||
|
||||
at91_seriald_hw_init(); |
||||
tny_a9260_nand_hw_init(); |
||||
at91_spi0_hw_init(1 << 5); |
||||
return 0; |
||||
} |
||||
|
||||
int dram_init(void) |
||||
{ |
||||
gd->ram_size = get_ram_size( |
||||
(void *)CONFIG_SYS_SDRAM_BASE, |
||||
CONFIG_SYS_SDRAM_SIZE); |
||||
return 0; |
||||
} |
||||
@ -1,3 +0,0 @@ |
||||
CONFIG_ARM=y |
||||
CONFIG_ARCH_AT91=y |
||||
CONFIG_TARGET_AFEB9260=y |
||||
@ -1,4 +0,0 @@ |
||||
CONFIG_ARM=y |
||||
CONFIG_ARCH_AT91=y |
||||
CONFIG_TARGET_SBC35_A9G20=y |
||||
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_EEPROM" |
||||
@ -1,4 +0,0 @@ |
||||
CONFIG_ARM=y |
||||
CONFIG_ARCH_AT91=y |
||||
CONFIG_TARGET_SBC35_A9G20=y |
||||
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_NANDFLASH" |
||||
@ -1,4 +0,0 @@ |
||||
CONFIG_ARM=y |
||||
CONFIG_ARCH_AT91=y |
||||
CONFIG_TARGET_TNY_A9260=y |
||||
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_EEPROM" |
||||
@ -1,4 +0,0 @@ |
||||
CONFIG_ARM=y |
||||
CONFIG_ARCH_AT91=y |
||||
CONFIG_TARGET_TNY_A9260=y |
||||
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9260,SYS_USE_NANDFLASH" |
||||
@ -1,4 +0,0 @@ |
||||
CONFIG_ARM=y |
||||
CONFIG_ARCH_AT91=y |
||||
CONFIG_TARGET_TNY_A9260=y |
||||
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_EEPROM" |
||||
@ -1,4 +0,0 @@ |
||||
CONFIG_ARM=y |
||||
CONFIG_ARCH_AT91=y |
||||
CONFIG_TARGET_TNY_A9260=y |
||||
CONFIG_SYS_EXTRA_OPTIONS="AT91SAM9G20,SYS_USE_NANDFLASH" |
||||
@ -1,156 +0,0 @@ |
||||
/*
|
||||
* (C) Copyright 2008 Sergey Lapin <slapin@ossfans.org> |
||||
* |
||||
* Configuation settings for the AFEB9260 board. |
||||
* Based on configuration for AT91SAM9260-EK |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#ifndef __CONFIG_H |
||||
#define __CONFIG_H |
||||
#define CONFIG_AT91SAM9260 /* Atmel AT91SAM9260 SoC*/ |
||||
#include <asm/arch/hardware.h> |
||||
|
||||
#define CONFIG_SYS_TEXT_BASE 0x21f00000 |
||||
|
||||
/* ARM asynchronous clock */ |
||||
#define CONFIG_SYS_AT91_MAIN_CLOCK 18429952 /* from 18.432 MHz crystal */ |
||||
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 |
||||
|
||||
#define CONFIG_BOARD_EARLY_INIT_F |
||||
#define CONFIG_DISPLAY_CPUINFO |
||||
|
||||
#define CONFIG_AFEB9260 /* AFEB9260 Board */ |
||||
#define CONFIG_ARCH_CPU_INIT |
||||
|
||||
#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */ |
||||
#define CONFIG_SETUP_MEMORY_TAGS 1 |
||||
#define CONFIG_INITRD_TAG 1 |
||||
|
||||
#define CONFIG_SKIP_LOWLEVEL_INIT |
||||
|
||||
/*
|
||||
* Hardware drivers |
||||
*/ |
||||
#define CONFIG_ATMEL_LEGACY |
||||
#define CONFIG_AT91_GPIO |
||||
#define CONFIG_AT91_PULLUP 1 |
||||
|
||||
#define CONFIG_ATMEL_USART |
||||
#define CONFIG_USART_BASE ATMEL_BASE_DBGU |
||||
#define CONFIG_USART_ID ATMEL_ID_SYS |
||||
#define CONFIG_USART3 /* USART 3 is DBGU */ |
||||
|
||||
#define CONFIG_BOOTDELAY 3 |
||||
|
||||
/*
|
||||
* BOOTP options |
||||
*/ |
||||
#define CONFIG_BOOTP_BOOTFILESIZE 1 |
||||
#define CONFIG_BOOTP_BOOTPATH 1 |
||||
#define CONFIG_BOOTP_GATEWAY 1 |
||||
#define CONFIG_BOOTP_HOSTNAME 1 |
||||
|
||||
/*
|
||||
* Command line configuration. |
||||
*/ |
||||
#include <config_cmd_default.h> |
||||
#undef CONFIG_CMD_BDI |
||||
#undef CONFIG_CMD_FPGA |
||||
#undef CONFIG_CMD_IMI |
||||
#undef CONFIG_CMD_IMLS |
||||
#undef CONFIG_CMD_LOADS |
||||
#undef CONFIG_CMD_SOURCE |
||||
|
||||
#define CONFIG_CMD_PING |
||||
#define CONFIG_CMD_DHCP |
||||
|
||||
#define CONFIG_CMD_NAND |
||||
#define CONFIG_CMD_USB |
||||
|
||||
/* SDRAM */ |
||||
#define CONFIG_NR_DRAM_BANKS 1 |
||||
#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 |
||||
#define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 megs */ |
||||
|
||||
/* DataFlash */ |
||||
#define CONFIG_ATMEL_DATAFLASH_SPI |
||||
#define CONFIG_HAS_DATAFLASH |
||||
#define CONFIG_SYS_MAX_DATAFLASH_BANKS 2 |
||||
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 0xC0000000 /* CS0 */ |
||||
#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 0xD0000000 /* CS1 */ |
||||
#define AT91_SPI_CLK 15000000 |
||||
#define DATAFLASH_TCSS (0x1a << 16) |
||||
#define DATAFLASH_TCHS (0x1 << 24) |
||||
|
||||
/* NAND flash */ |
||||
#ifdef CONFIG_CMD_NAND |
||||
#define CONFIG_NAND_ATMEL |
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1 |
||||
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 |
||||
#define CONFIG_SYS_NAND_DBW_8 |
||||
/* our ALE is AD21 */ |
||||
#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) |
||||
/* our CLE is AD22 */ |
||||
#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) |
||||
#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 |
||||
#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 |
||||
|
||||
#endif |
||||
|
||||
/* NOR flash - no real flash on this board */ |
||||
#define CONFIG_SYS_NO_FLASH |
||||
|
||||
/* Ethernet */ |
||||
#define CONFIG_MACB |
||||
#define CONFIG_RESET_PHY_R |
||||
#define CONFIG_AT91_WANTS_COMMON_PHY |
||||
#define CONFIG_NET_RETRY_COUNT 20 |
||||
|
||||
/* USB */ |
||||
#define CONFIG_USB_ATMEL |
||||
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB |
||||
#define CONFIG_USB_OHCI_NEW |
||||
#define CONFIG_DOS_PARTITION |
||||
#define CONFIG_SYS_USB_OHCI_CPU_INIT |
||||
#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */ |
||||
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" |
||||
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1 |
||||
#define CONFIG_USB_STORAGE |
||||
|
||||
#define CONFIG_SYS_LOAD_ADDR 0x21000000 /* load address */ |
||||
|
||||
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
||||
#define CONFIG_SYS_MEMTEST_END 0x21e00000 |
||||
|
||||
#define CONFIG_SYS_USE_DATAFLASH_CS1 |
||||
#define CONFIG_SYS_INIT_SP_ADDR (ATMEL_BASE_SRAM1 + 0x1000 -\ |
||||
GENERATED_GBL_DATA_SIZE) |
||||
|
||||
/* bootstrap + u-boot + env + linux in dataflash on CS1 */ |
||||
#define CONFIG_ENV_IS_IN_DATAFLASH |
||||
#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + 0x8400) |
||||
#define CONFIG_ENV_OFFSET 0x4200 |
||||
#define CONFIG_ENV_ADDR (CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + CONFIG_ENV_OFFSET) |
||||
#define CONFIG_ENV_SIZE 0x4200 |
||||
#define CONFIG_BOOTCOMMAND "nand read 0x21000000 0xa0000 0x200000; bootm" |
||||
#define CONFIG_BOOTARGS "console=ttyS0,115200 " \ |
||||
"root=/dev/mtdblock2 " \
|
||||
"rw rootfstype=jffs2 panic=20" |
||||
|
||||
#define CONFIG_BAUDRATE 115200 |
||||
|
||||
#define CONFIG_SYS_PROMPT "U-Boot> " |
||||
#define CONFIG_SYS_CBSIZE 256 |
||||
#define CONFIG_SYS_MAXARGS 16 |
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
||||
#define CONFIG_SYS_LONGHELP |
||||
#define CONFIG_CMDLINE_EDITING |
||||
|
||||
/*
|
||||
* Size of malloc() pool |
||||
*/ |
||||
#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) |
||||
|
||||
#endif |
||||
@ -1,169 +0,0 @@ |
||||
/*
|
||||
* Copyright (C) 2009 |
||||
* Albin Tonnerre, Free Electrons <albin.tonnerre@free-electrons.com> |
||||
* |
||||
* Configuation settings for the Calao SBC35-A9G20 board |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#ifndef __CONFIG_H |
||||
#define __CONFIG_H |
||||
|
||||
/* SoC type is defined in boards.cfg */ |
||||
#include <asm/hardware.h> |
||||
#include <linux/sizes.h> |
||||
|
||||
#if defined(CONFIG_SYS_USE_NANDFLASH) |
||||
#define CONFIG_ENV_IS_IN_NAND |
||||
#else |
||||
#define CONFIG_ENV_IS_IN_EEPROM |
||||
#endif |
||||
|
||||
#define MACH_TYPE_SBC35_A9G20 1848 |
||||
#define CONFIG_MACH_TYPE MACH_TYPE_SBC35_A9G20 |
||||
|
||||
/* ARM asynchronous clock */ |
||||
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ |
||||
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12.000 MHz crystal */ |
||||
|
||||
#define CONFIG_ARCH_CPU_INIT |
||||
|
||||
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
||||
#define CONFIG_SETUP_MEMORY_TAGS |
||||
#define CONFIG_INITRD_TAG |
||||
#define CONFIG_SKIP_LOWLEVEL_INIT |
||||
|
||||
/* GPIO */ |
||||
#define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ |
||||
#define CONFIG_AT91_GPIO |
||||
|
||||
/* Serial */ |
||||
#define CONFIG_ATMEL_USART |
||||
#define CONFIG_USART_BASE ATMEL_BASE_DBGU |
||||
#define CONFIG_USART_ID ATMEL_ID_SYS |
||||
#define CONFIG_BAUDRATE 115200 |
||||
|
||||
#define CONFIG_BOOTDELAY 3 |
||||
|
||||
/*
|
||||
* BOOTP options |
||||
*/ |
||||
#define CONFIG_BOOTP_BOOTFILESIZE |
||||
#define CONFIG_BOOTP_BOOTPATH |
||||
#define CONFIG_BOOTP_GATEWAY |
||||
#define CONFIG_BOOTP_HOSTNAME |
||||
|
||||
/*
|
||||
* Command line configuration. |
||||
*/ |
||||
#include <config_cmd_default.h> |
||||
#undef CONFIG_CMD_BDI |
||||
#undef CONFIG_CMD_FPGA |
||||
#undef CONFIG_CMD_IMI |
||||
#undef CONFIG_CMD_IMLS |
||||
#undef CONFIG_CMD_LOADS |
||||
#undef CONFIG_CMD_SOURCE |
||||
|
||||
#define CONFIG_CMD_PING |
||||
#define CONFIG_CMD_DHCP |
||||
#define CONFIG_CMD_USB |
||||
|
||||
/* SDRAM */ |
||||
#define CONFIG_NR_DRAM_BANKS 1 |
||||
#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 |
||||
#define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 megs */ |
||||
#define CONFIG_SYS_INIT_SP_ADDR (ATMEL_BASE_SRAM1 + 0x1000 - \ |
||||
GENERATED_GBL_DATA_SIZE) |
||||
|
||||
/* SPI EEPROM */ |
||||
#define CONFIG_SPI |
||||
#define CONFIG_CMD_SPI |
||||
#define CONFIG_ATMEL_SPI |
||||
|
||||
#define CONFIG_CMD_EEPROM |
||||
#define CONFIG_SPI_M95XXX |
||||
#define CONFIG_SYS_EEPROM_SIZE 0x10000 |
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 |
||||
|
||||
/* SPI RTC */ |
||||
#define CONFIG_CMD_DATE |
||||
#define CONFIG_RTC_M41T94 |
||||
#define CONFIG_M41T94_SPI_BUS 0 |
||||
#define CONFIG_M41T94_SPI_CS 0 |
||||
|
||||
/* NAND flash */ |
||||
#define CONFIG_CMD_NAND |
||||
#define CONFIG_NAND_ATMEL |
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1 |
||||
#define CONFIG_SYS_NAND_BASE 0x40000000 |
||||
#define CONFIG_SYS_NAND_DBW_8 |
||||
/* our ALE is AD21 */ |
||||
#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) |
||||
/* our CLE is AD22 */ |
||||
#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) |
||||
#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 |
||||
#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 |
||||
|
||||
/* NOR flash - no real flash on this board */ |
||||
#define CONFIG_SYS_NO_FLASH 1 |
||||
|
||||
/* Ethernet */ |
||||
#define CONFIG_MACB |
||||
#define CONFIG_RMII |
||||
#define CONFIG_NET_RETRY_COUNT 20 |
||||
#define CONFIG_RESET_PHY_R |
||||
#define CONFIG_MACB_SEARCH_PHY |
||||
#define CONFIG_AT91_WANTS_COMMON_PHY |
||||
|
||||
/* USB */ |
||||
#define CONFIG_USB_ATMEL |
||||
#define CONFIG_USB_ATMEL_CLK_SEL_PLLB |
||||
#define CONFIG_USB_OHCI_NEW |
||||
#define CONFIG_DOS_PARTITION |
||||
#define CONFIG_SYS_USB_OHCI_CPU_INIT |
||||
#define CONFIG_SYS_USB_OHCI_REGS_BASE 0x00500000 /* AT91SAM9260_UHP_BASE */ |
||||
#define CONFIG_SYS_USB_OHCI_SLOT_NAME "at91sam9260" |
||||
#define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2 |
||||
#define CONFIG_USB_STORAGE |
||||
#define CONFIG_CMD_FAT |
||||
|
||||
#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ |
||||
|
||||
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
||||
#define CONFIG_SYS_MEMTEST_END 0x23e00000 |
||||
|
||||
/* Env in EEPROM, bootstrap + u-boot in NAND*/ |
||||
#ifdef CONFIG_ENV_IS_IN_EEPROM |
||||
#define CONFIG_ENV_OFFSET 0x20 |
||||
#define CONFIG_ENV_SIZE 0x1000 |
||||
#endif |
||||
|
||||
/* Env, bootstrap and u-boot in NAND */ |
||||
#ifdef CONFIG_ENV_IS_IN_NAND |
||||
#define CONFIG_ENV_OFFSET 0x60000 |
||||
#define CONFIG_ENV_OFFSET_REDUND 0x80000 |
||||
#define CONFIG_ENV_SIZE 0x20000 |
||||
#endif |
||||
|
||||
#define CONFIG_BOOTCOMMAND "nboot 0x21000000 0 400000" |
||||
#define CONFIG_BOOTARGS "console=ttyS0,115200 " \ |
||||
"root=/dev/mtdblock1 " \
|
||||
"mtdparts=atmel_nand:16M(kernel)ro," \
|
||||
"120M(rootfs),-(other) " \
|
||||
"rw rootfstype=jffs2" |
||||
|
||||
|
||||
#define CONFIG_SYS_PROMPT "U-Boot> " |
||||
#define CONFIG_SYS_CBSIZE 256 |
||||
#define CONFIG_SYS_MAXARGS 16 |
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
||||
#define CONFIG_SYS_LONGHELP 1 |
||||
#define CONFIG_CMDLINE_EDITING 1 |
||||
|
||||
/*
|
||||
* Size of malloc() pool |
||||
*/ |
||||
#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000) |
||||
|
||||
#endif |
||||
@ -1,150 +0,0 @@ |
||||
/*
|
||||
* (C) Copyright 2007-2008 |
||||
* Stelian Pop <stelian@popies.net> |
||||
* Lead Tech Design <www.leadtechdesign.com> |
||||
* |
||||
* Copyright (C) 2009 |
||||
* Albin Tonnerre, Free Electrons <albin.tonnerre@free-electrons.com> |
||||
* |
||||
* Configuation settings for the Calao TNY-A9260 and TNY-A9G20 boards |
||||
* |
||||
* SPDX-License-Identifier: GPL-2.0+ |
||||
*/ |
||||
|
||||
#ifndef __CONFIG_H |
||||
#define __CONFIG_H |
||||
|
||||
/*
|
||||
* SoC must be defined first, before hardware.h is included. |
||||
* In this case SoC is defined in boards.cfg. |
||||
*/ |
||||
#include <asm/hardware.h> |
||||
|
||||
#if defined(CONFIG_TNY_A9260_NANDFLASH) || defined(CONFIG_TNY_A9G20_NANDFLASH) |
||||
#define CONFIG_ENV_IS_IN_NAND |
||||
#else |
||||
#define CONFIG_ENV_IS_IN_EEPROM |
||||
#endif |
||||
|
||||
/* Define actual evaluation board type from used processor type */ |
||||
#ifdef CONFIG_AT91SAM9G20 |
||||
# define CONFIG_TNY_A9G20 |
||||
# define MACH_TYPE_TNY_A9G20 2059 |
||||
# define CONFIG_MACH_TYPE MACH_TYPE_TNY_A9G20 |
||||
#else |
||||
# define CONFIG_TNY_A9260 |
||||
# define MACH_TYPE_TNY_A9260 2058 |
||||
# define CONFIG_MACH_TYPE MACH_TYPE_TNY_A9260 |
||||
#endif |
||||
|
||||
/* ARM asynchronous clock */ |
||||
#define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */ |
||||
#define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */ |
||||
|
||||
#define CONFIG_ARCH_CPU_INIT |
||||
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ |
||||
#define CONFIG_SETUP_MEMORY_TAGS |
||||
#define CONFIG_INITRD_TAG |
||||
#define CONFIG_SKIP_LOWLEVEL_INIT |
||||
|
||||
/*
|
||||
* Hardware drivers |
||||
*/ |
||||
#define CONFIG_ATMEL_LEGACY |
||||
#define CONFIG_AT91_GPIO |
||||
|
||||
#define CONFIG_ATMEL_USART |
||||
#define CONFIG_USART_BASE ATMEL_BASE_DBGU |
||||
#define CONFIG_USART_ID ATMEL_ID_SYS |
||||
#define CONFIG_BAUDRATE 115200 |
||||
|
||||
#define CONFIG_BOOTDELAY 3 |
||||
|
||||
/*
|
||||
* Command line configuration. |
||||
*/ |
||||
#include <config_cmd_default.h> |
||||
#undef CONFIG_CMD_BDI |
||||
#undef CONFIG_CMD_FPGA |
||||
#undef CONFIG_CMD_IMI |
||||
#undef CONFIG_CMD_IMLS |
||||
#undef CONFIG_CMD_LOADS |
||||
#undef CONFIG_CMD_NET |
||||
#undef CONFIG_CMD_NFS |
||||
#undef CONFIG_CMD_SOURCE |
||||
#undef CONFIG_CMD_USB |
||||
|
||||
/* SDRAM */ |
||||
#define CONFIG_NR_DRAM_BANKS 1 |
||||
#define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1 |
||||
#define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 megs */ |
||||
# define CONFIG_SYS_INIT_SP_ADDR \ |
||||
(ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE) |
||||
|
||||
/* SPI EEPROM */ |
||||
#define CONFIG_SPI |
||||
#define CONFIG_CMD_SPI |
||||
#define CONFIG_ATMEL_SPI |
||||
|
||||
#define CONFIG_CMD_EEPROM |
||||
#define CONFIG_SPI_M95XXX |
||||
#define CONFIG_SYS_EEPROM_SIZE 0x10000 |
||||
#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 |
||||
|
||||
/* NAND flash */ |
||||
#define CONFIG_CMD_NAND |
||||
#define CONFIG_NAND_ATMEL |
||||
#define CONFIG_SYS_MAX_NAND_DEVICE 1 |
||||
#define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3 |
||||
#define CONFIG_SYS_NAND_DBW_8 |
||||
/* our ALE is AD21 */ |
||||
#define CONFIG_SYS_NAND_MASK_ALE (1 << 21) |
||||
/* our CLE is AD22 */ |
||||
#define CONFIG_SYS_NAND_MASK_CLE (1 << 22) |
||||
#define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14 |
||||
#define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13 |
||||
|
||||
/* NOR flash - no real flash on this board */ |
||||
#define CONFIG_SYS_NO_FLASH |
||||
|
||||
#define CONFIG_DOS_PARTITION |
||||
#define CONFIG_CMD_FAT |
||||
|
||||
#define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ |
||||
|
||||
#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE |
||||
#define CONFIG_SYS_MEMTEST_END 0x23e00000 |
||||
|
||||
/* Env in EEPROM, bootstrap + u-boot in NAND*/ |
||||
#ifdef CONFIG_ENV_IS_IN_EEPROM |
||||
#define CONFIG_ENV_OFFSET 0x20 |
||||
#define CONFIG_ENV_SIZE 0x1000 |
||||
#endif |
||||
|
||||
/* Env, bootstrap and u-boot in NAND */ |
||||
#ifdef CONFIG_ENV_IS_IN_NAND |
||||
#define CONFIG_ENV_OFFSET 0x60000 |
||||
#define CONFIG_ENV_OFFSET_REDUND 0x80000 |
||||
#define CONFIG_ENV_SIZE 0x20000 |
||||
#endif |
||||
|
||||
#define CONFIG_BOOTCOMMAND "nboot 0x21000000 0 400000" |
||||
#define CONFIG_BOOTARGS "console=ttyS0,115200 " \ |
||||
"root=/dev/mtdblock1 " \
|
||||
"mtdparts=atmel_nand:16M(kernel)ro," \
|
||||
"120M(rootfs),-(other) " \
|
||||
"rw rootfstype=jffs2" |
||||
|
||||
#define CONFIG_SYS_PROMPT "U-Boot> " |
||||
#define CONFIG_SYS_CBSIZE 256 |
||||
#define CONFIG_SYS_MAXARGS 16 |
||||
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) |
||||
#define CONFIG_SYS_LONGHELP |
||||
#define CONFIG_CMDLINE_EDITING |
||||
|
||||
/*
|
||||
* Size of malloc() pool |
||||
*/ |
||||
#define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000) |
||||
|
||||
#endif |
||||
Loading…
Reference in new issue