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@ -95,6 +95,17 @@ |
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ZYNQ_GEM_DMACR_TXSIZE | \
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ZYNQ_GEM_DMACR_RXBUF) |
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/* Use MII register 1 (MII status register) to detect PHY */ |
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#define PHY_DETECT_REG 1 |
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/* Mask used to verify certain PHY features (or register contents)
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* in the register above: |
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* 0x1000: 10Mbps full duplex support |
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* 0x0800: 10Mbps half duplex support |
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* 0x0008: Auto-negotiation support |
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*/ |
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#define PHY_DETECT_MASK 0x1808 |
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/* Device registers */ |
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struct zynq_gem_regs { |
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u32 nwctrl; /* Network Control reg */ |
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@ -201,6 +212,44 @@ static u32 phywrite(struct eth_device *dev, u32 phy_addr, u32 regnum, u16 data) |
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ZYNQ_GEM_PHYMNTNC_OP_W_MASK, &data); |
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} |
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static void phy_detection(struct eth_device *dev) |
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{ |
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int i; |
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u16 phyreg; |
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struct zynq_gem_priv *priv = dev->priv; |
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if (priv->phyaddr != -1) { |
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phyread(dev, priv->phyaddr, PHY_DETECT_REG, &phyreg); |
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if ((phyreg != 0xFFFF) && |
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((phyreg & PHY_DETECT_MASK) == PHY_DETECT_MASK)) { |
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/* Found a valid PHY address */ |
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debug("Default phy address %d is valid\n", |
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priv->phyaddr); |
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return; |
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} else { |
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debug("PHY address is not setup correctly %d\n", |
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priv->phyaddr); |
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priv->phyaddr = -1; |
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} |
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} |
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debug("detecting phy address\n"); |
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if (priv->phyaddr == -1) { |
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/* detect the PHY address */ |
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for (i = 31; i >= 0; i--) { |
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phyread(dev, i, PHY_DETECT_REG, &phyreg); |
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if ((phyreg != 0xFFFF) && |
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((phyreg & PHY_DETECT_MASK) == PHY_DETECT_MASK)) { |
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/* Found a valid PHY address */ |
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priv->phyaddr = i; |
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debug("Found valid phy address, %d\n", i); |
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return; |
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} |
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} |
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} |
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printf("PHY is not detected\n"); |
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} |
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static int zynq_gem_setup_mac(struct eth_device *dev) |
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{ |
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u32 i, macaddrlow, macaddrhigh; |
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@ -290,6 +339,8 @@ static int zynq_gem_init(struct eth_device *dev, bd_t * bis) |
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priv->init++; |
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} |
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phy_detection(dev); |
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/* interface - look at tsec */ |
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phydev = phy_connect(priv->bus, priv->phyaddr, dev, 0); |
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