Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> CC: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>master
parent
5dd372a23d
commit
f9913a8ee7
@ -0,0 +1,49 @@ |
||||
#
|
||||
# (C) Copyright 2000-2006
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# (C) Copyright 2007
|
||||
# Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
||||
#
|
||||
# (C) Copyright 2007
|
||||
# Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
|
||||
include $(TOPDIR)/config.mk |
||||
|
||||
LIB = $(obj)lib$(CPU).a
|
||||
|
||||
START = start.o
|
||||
OBJS = cpu.o interrupts.o watchdog.o time.o cache.o
|
||||
|
||||
all: .depend $(START) $(LIB) |
||||
|
||||
$(LIB): $(OBJS) |
||||
$(AR) crv $@ $(OBJS)
|
||||
|
||||
#########################################################################
|
||||
|
||||
.depend: Makefile $(START:.o=.S) $(OBJS:.o=.c) |
||||
$(CC) -M $(CFLAGS) $(START:.o=.S) $(OBJS:.o=.c) > $@
|
||||
|
||||
sinclude .depend |
||||
|
||||
#########################################################################
|
@ -0,0 +1,112 @@ |
||||
/*
|
||||
* (C) Copyright 2007 |
||||
* Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> |
||||
* |
||||
* (C) Copyright 2007 |
||||
* Nobobuhiro Iwamatsu <iwamatsu@nigauri.org> |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <command.h> |
||||
#include <asm/processor.h> |
||||
#include <asm/io.h> |
||||
|
||||
/*
|
||||
* Jump to P2 area. |
||||
* When handling TLB or caches, we need to do it from P2 area. |
||||
*/ |
||||
#define jump_to_P2() \ |
||||
do { \
|
||||
unsigned long __dummy; \
|
||||
__asm__ __volatile__( \
|
||||
"mov.l 1f, %0\n\t" \
|
||||
"or %1, %0\n\t" \
|
||||
"jmp @%0\n\t" \
|
||||
" nop\n\t" \
|
||||
".balign 4\n" \
|
||||
"1: .long 2f\n" \
|
||||
"2:" \
|
||||
: "=&r" (__dummy) \
|
||||
: "r" (0x20000000)); \
|
||||
} while (0) |
||||
|
||||
/*
|
||||
* Back to P1 area. |
||||
*/ |
||||
#define back_to_P1() \ |
||||
do { \
|
||||
unsigned long __dummy; \
|
||||
__asm__ __volatile__( \
|
||||
"nop;nop;nop;nop;nop;nop;nop\n\t" \
|
||||
"mov.l 1f, %0\n\t" \
|
||||
"jmp @%0\n\t" \
|
||||
" nop\n\t" \
|
||||
".balign 4\n" \
|
||||
"1: .long 2f\n" \
|
||||
"2:" \
|
||||
: "=&r" (__dummy)); \
|
||||
} while (0) |
||||
|
||||
#define CACHE_VALID 1 |
||||
#define CACHE_UPDATED 2 |
||||
|
||||
static inline void cache_wback_all(void) |
||||
{ |
||||
unsigned long addr, data, i, j; |
||||
|
||||
jump_to_P2(); |
||||
for (i = 0; i < CACHE_OC_NUM_ENTRIES; i++) { |
||||
for (j = 0; j < CACHE_OC_NUM_WAYS; j++) { |
||||
addr = CACHE_OC_ADDRESS_ARRAY |
||||
| (j << CACHE_OC_WAY_SHIFT) |
||||
| (i << CACHE_OC_ENTRY_SHIFT); |
||||
data = inl(addr); |
||||
if (data & CACHE_UPDATED) { |
||||
data &= ~CACHE_UPDATED; |
||||
outl(data, addr); |
||||
} |
||||
} |
||||
} |
||||
back_to_P1(); |
||||
} |
||||
|
||||
|
||||
#define CACHE_ENABLE 0 |
||||
#define CACHE_DISABLE 1 |
||||
|
||||
int cache_control(unsigned int cmd) |
||||
{ |
||||
unsigned long ccr; |
||||
|
||||
jump_to_P2(); |
||||
ccr = inl(CCR); |
||||
|
||||
if (ccr & CCR_CACHE_ENABLE) |
||||
cache_wback_all(); |
||||
|
||||
if (cmd == CACHE_DISABLE) |
||||
outl(CCR_CACHE_STOP, CCR); |
||||
else |
||||
outl(CCR_CACHE_INIT, CCR); |
||||
back_to_P1(); |
||||
|
||||
return 0; |
||||
} |
@ -0,0 +1,31 @@ |
||||
#
|
||||
# (C) Copyright 2000-2004
|
||||
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
#
|
||||
# (C) Copyright 2007
|
||||
# Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
||||
#
|
||||
# (C) Copyright 2007
|
||||
# Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
|
||||
#
|
||||
# See file CREDITS for list of people who contributed to this
|
||||
# project.
|
||||
#
|
||||
# This program is free software; you can redistribute it and/or
|
||||
# modify it under the terms of the GNU General Public License as
|
||||
# published by the Free Software Foundation; either version 2 of
|
||||
# the License, or (at your option) any later version.
|
||||
#
|
||||
# This program is distributed in the hope that it will be useful,
|
||||
# but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
# You should have received a copy of the GNU General Public License
|
||||
# along with this program; if not, write to the Free Software
|
||||
# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
# MA 02111-1307 USA
|
||||
#
|
||||
#
|
||||
PLATFORM_CPPFLAGS += -m3
|
||||
PLATFORM_RELFLAGS += -ffixed-r13
|
@ -0,0 +1,84 @@ |
||||
/*
|
||||
* (C) Copyright 2007 |
||||
* Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> |
||||
* |
||||
* (C) Copyright 2007 |
||||
* Nobuhiro Iwamatsu <iwamatsu@nigauri.org> |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <command.h> |
||||
#include <asm/processor.h> |
||||
|
||||
int checkcpu(void) |
||||
{ |
||||
puts("CPU: SH3\n"); |
||||
return 0; |
||||
} |
||||
|
||||
int cpu_init(void) |
||||
{ |
||||
return 0; |
||||
} |
||||
|
||||
int cleanup_before_linux(void) |
||||
{ |
||||
disable_interrupts(); |
||||
return 0; |
||||
} |
||||
|
||||
int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) |
||||
{ |
||||
disable_interrupts(); |
||||
reset_cpu(0); |
||||
return 0; |
||||
} |
||||
|
||||
void flush_cache(unsigned long addr, unsigned long size) |
||||
{ |
||||
|
||||
} |
||||
|
||||
void icache_enable(void) |
||||
{ |
||||
} |
||||
|
||||
void icache_disable(void) |
||||
{ |
||||
} |
||||
|
||||
int icache_status(void) |
||||
{ |
||||
return 0; |
||||
} |
||||
|
||||
void dcache_enable(void) |
||||
{ |
||||
} |
||||
|
||||
void dcache_disable(void) |
||||
{ |
||||
} |
||||
|
||||
int dcache_status(void) |
||||
{ |
||||
return 0; |
||||
} |
@ -0,0 +1,42 @@ |
||||
/*
|
||||
* (C) Copyright 2007 |
||||
* Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> |
||||
* |
||||
* (C) Copyright 2007 |
||||
* Nobuhiro Iwamatsu <iwamatsu@nigauri.org> |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
|
||||
int interrupt_init(void) |
||||
{ |
||||
return 0; |
||||
} |
||||
|
||||
void enable_interrupts(void) |
||||
{ |
||||
|
||||
} |
||||
|
||||
int disable_interrupts(void) |
||||
{ |
||||
return 0; |
||||
} |
@ -0,0 +1,77 @@ |
||||
/* |
||||
* (C) Copyright 2007 |
||||
* Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
|
||||
* |
||||
* (C) Copyright 2007 |
||||
* Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
|
||||
* |
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#include <config.h> |
||||
#include <version.h> |
||||
|
||||
.text |
||||
.align 2
|
||||
|
||||
.global _start
|
||||
_start: |
||||
mov.l ._lowlevel_init, r0 |
||||
100: bsrf r0 |
||||
nop |
||||
|
||||
bsr 1f |
||||
nop |
||||
1: sts pr, r5 |
||||
mov.l ._reloc_dst, r4 |
||||
add #(_start-1b), r5 |
||||
mov.l ._reloc_dst_end, r6 |
||||
|
||||
2: mov.l @r5+, r1
|
||||
mov.l r1, @r4
|
||||
add #4, r4 |
||||
cmp/hs r6, r4 |
||||
bf 2b |
||||
|
||||
mov.l ._bss_start, r4 |
||||
mov.l ._bss_end, r5 |
||||
mov #0, r1 |
||||
|
||||
3: mov.l r1, @r4 /* bss clear */
|
||||
add #4, r4 |
||||
cmp/hs r5, r4 |
||||
bf 3b |
||||
|
||||
mov.l ._gd_init, r13 /* global data */ |
||||
mov.l ._stack_init, r15 /* stack */ |
||||
|
||||
mov.l ._sh_generic_init, r0 |
||||
jsr @r0
|
||||
nop |
||||
|
||||
loop: |
||||
bra loop |
||||
|
||||
.align 2
|
||||
|
||||
._lowlevel_init: .long (lowlevel_init - (100b + 4)) |
||||
._reloc_dst: .long reloc_dst
|
||||
._reloc_dst_end: .long reloc_dst_end
|
||||
._bss_start: .long bss_start
|
||||
._bss_end: .long bss_end
|
||||
._gd_init: .long (_start - CFG_GBL_DATA_SIZE) |
||||
._stack_init: .long (_start - CFG_GBL_DATA_SIZE - CFG_MALLOC_LEN - 16) |
||||
._sh_generic_init: .long sh_generic_init
|
@ -0,0 +1,103 @@ |
||||
/*
|
||||
* (C) Copyright 2007 |
||||
* Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> |
||||
* |
||||
* (C) Copyright 2007 |
||||
* Nobobuhiro Iwamatsu <iwamatsu@nigauri.org> |
||||
* |
||||
* (C) Copyright 2003 |
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
||||
* |
||||
* See file CREDITS for list of people who contributed to this |
||||
* project. |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <asm/processor.h> |
||||
#include <asm/io.h> |
||||
|
||||
#define TMU_MAX_COUNTER (~0UL) |
||||
|
||||
static void tmu_timer_start(unsigned int timer) |
||||
{ |
||||
if (timer > 2) |
||||
return; |
||||
|
||||
outb(inb(TSTR) | (1 << timer), TSTR); |
||||
} |
||||
|
||||
static void tmu_timer_stop(unsigned int timer) |
||||
{ |
||||
u8 val = inb(TSTR); |
||||
|
||||
if (timer > 2) |
||||
return; |
||||
outb(val & ~(1 << timer), TSTR); |
||||
} |
||||
|
||||
int timer_init(void) |
||||
{ |
||||
/* Divide clock by 4 */ |
||||
outw(0, TCR0); |
||||
|
||||
tmu_timer_stop(0); |
||||
tmu_timer_start(0); |
||||
return 0; |
||||
} |
||||
|
||||
/*
|
||||
In theory we should return a true 64bit value (ie something that doesn't |
||||
overflow). However, we don't. Therefore if TMU runs at fastest rate of |
||||
6.75 MHz this value will wrap after u-boot has been running for approx |
||||
10 minutes. |
||||
*/ |
||||
unsigned long long get_ticks(void) |
||||
{ |
||||
return (0 - inl(TCNT0)); |
||||
} |
||||
|
||||
unsigned long get_timer(unsigned long base) |
||||
{ |
||||
return ((0 - inl(TCNT0)) - base); |
||||
} |
||||
|
||||
void set_timer(unsigned long t) |
||||
{ |
||||
outl(0 - t, TCNT0); |
||||
} |
||||
|
||||
void reset_timer(void) |
||||
{ |
||||
tmu_timer_stop(0); |
||||
set_timer(0); |
||||
tmu_timer_start(0); |
||||
} |
||||
|
||||
void udelay(unsigned long usec) |
||||
{ |
||||
unsigned int start = get_timer(0); |
||||
unsigned int end = start + (usec * ((CFG_HZ + 500000) / 1000000)); |
||||
|
||||
while (get_timer(0) < end) |
||||
continue; |
||||
} |
||||
|
||||
unsigned long get_tbclk(void) |
||||
{ |
||||
return CFG_HZ; |
||||
} |
@ -0,0 +1,33 @@ |
||||
/*
|
||||
* (C) Copyright 2007 |
||||
* Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#include <common.h> |
||||
#include <asm/processor.h> |
||||
|
||||
int watchdog_init(void) |
||||
{ |
||||
return 0; |
||||
} |
||||
|
||||
void reset_cpu(unsigned long ignored) |
||||
{ |
||||
while (1) |
||||
; |
||||
} |
@ -0,0 +1,40 @@ |
||||
/*
|
||||
* (C) Copyright 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org> |
||||
* (C) Copyright 2007 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#ifndef _ASM_CPU_SH3_H_ |
||||
#define _ASM_CPU_SH3_H_ |
||||
|
||||
/* cache control */ |
||||
#define CCR_CACHE_STOP 0x00000008 |
||||
#define CCR_CACHE_ENABLE 0x00000005 |
||||
#define CCR_CACHE_ICI 0x00000008 |
||||
|
||||
#define CACHE_OC_ADDRESS_ARRAY 0xf0000000 |
||||
#define CACHE_OC_WAY_SHIFT 13 |
||||
#define CACHE_OC_NUM_ENTRIES 256 |
||||
#define CACHE_OC_ENTRY_SHIFT 4 |
||||
|
||||
#if defined(CONFIG_CPU_SH7720) |
||||
#include <asm/cpu_sh7720.h> |
||||
#else |
||||
#error "Unknown SH3 variant" |
||||
#endif |
||||
|
||||
#endif /* _ASM_CPU_SH3_H_ */ |
@ -0,0 +1,207 @@ |
||||
/*
|
||||
* (C) Copyright 2007 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> |
||||
* |
||||
* SH7720 Internal I/O register |
||||
* |
||||
* This program is free software; you can redistribute it and/or |
||||
* modify it under the terms of the GNU General Public License as |
||||
* published by the Free Software Foundation; either version 2 of |
||||
* the License, or (at your option) any later version. |
||||
* |
||||
* This program is distributed in the hope that it will be useful, |
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of |
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
||||
* GNU General Public License for more details. |
||||
* |
||||
* You should have received a copy of the GNU General Public License |
||||
* along with this program; if not, write to the Free Software |
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
||||
* MA 02111-1307 USA |
||||
*/ |
||||
|
||||
#ifndef _ASM_CPU_SH7720_H_ |
||||
#define _ASM_CPU_SH7720_H_ |
||||
|
||||
#define CACHE_OC_NUM_WAYS 4 |
||||
#define CCR_CACHE_INIT 0x0000000B |
||||
|
||||
/* EXP */ |
||||
#define TRA 0xFFFFFFD0 |
||||
#define EXPEVT 0xFFFFFFD4 |
||||
#define INTEVT 0xFFFFFFD8 |
||||
|
||||
/* MMU */ |
||||
#define MMUCR 0xFFFFFFE0 |
||||
#define PTEH 0xFFFFFFF0 |
||||
#define PTEL 0xFFFFFFF4 |
||||
#define TTB 0xFFFFFFF8 |
||||
|
||||
/* CACHE */ |
||||
#define CCR 0xFFFFFFEC |
||||
|
||||
/* INTC */ |
||||
#define IPRF 0xA4080000 |
||||
#define IPRG 0xA4080002 |
||||
#define IPRH 0xA4080004 |
||||
#define IPRI 0xA4080006 |
||||
#define IPRJ 0xA4080008 |
||||
#define IRR5 0xA4080020 |
||||
#define IRR6 0xA4080022 |
||||
#define IRR7 0xA4080024 |
||||
#define IRR8 0xA4080026 |
||||
#define IRR9 0xA4080028 |
||||
#define IRR0 0xA4140004 |
||||
#define IRR1 0xA4140006 |
||||
#define IRR2 0xA4140008 |
||||
#define IRR3 0xA414000A |
||||
#define IRR4 0xA414000C |
||||
#define ICR1 0xA4140010 |
||||
#define ICR2 0xA4140012 |
||||
#define PINTER 0xA4140014 |
||||
#define IPRC 0xA4140016 |
||||
#define IPRD 0xA4140018 |
||||
#define IPRE 0xA414001A |
||||
#define ICR0 0xA414FEE0 |
||||
#define IPRA 0xA414FEE2 |
||||
#define IPRB 0xA414FEE4 |
||||
|
||||
/* BSC */ |
||||
#define BSC_BASE 0xA4FD0000 |
||||
#define CMNCR (BSC_BASE + 0x00) |
||||
#define CS0BCR (BSC_BASE + 0x04) |
||||
#define CS2BCR (BSC_BASE + 0x08) |
||||
#define CS3BCR (BSC_BASE + 0x0C) |
||||
#define CS4BCR (BSC_BASE + 0x10) |
||||
#define CS5ABCR (BSC_BASE + 0x14) |
||||
#define CS5BBCR (BSC_BASE + 0x18) |
||||
#define CS6ABCR (BSC_BASE + 0x1C) |
||||
#define CS6BBCR (BSC_BASE + 0x20) |
||||
#define CS0WCR (BSC_BASE + 0x24) |
||||
#define CS2WCR (BSC_BASE + 0x28) |
||||
#define CS3WCR (BSC_BASE + 0x2C) |
||||
#define CS4WCR (BSC_BASE + 0x30) |
||||
#define CS5AWCR (BSC_BASE + 0x34) |
||||
#define CS5BWCR (BSC_BASE + 0x38) |
||||
#define CS6AWCR (BSC_BASE + 0x3C) |
||||
#define CS6BWCR (BSC_BASE + 0x40) |
||||
#define SDCR (BSC_BASE + 0x44) |
||||
#define RTCSR (BSC_BASE + 0x48) |
||||
#define RTCNR (BSC_BASE + 0x4C) |
||||
#define RTCOR (BSC_BASE + 0x50) |
||||
#define SDMR2 (BSC_BASE + 0x4000) |
||||
#define SDMR3 (BSC_BASE + 0x5000) |
||||
|
||||
/* DMAC */ |
||||
|
||||
/* CPG */ |
||||
#define UCLKCR 0xA40A0008 |
||||
#define FRQCR 0xA415FF80 |
||||
|
||||
/* LOW POWER MODE */ |
||||
|
||||
/* TMU */ |
||||
#define TMU_BASE 0xA412FE90 |
||||
#define TSTR (TMU_BASE + 0x02) |
||||
#define TCOR0 (TMU_BASE + 0x04) |
||||
#define TCNT0 (TMU_BASE + 0x08) |
||||
#define TCR0 (TMU_BASE + 0x0C) |
||||
#define TCOR1 (TMU_BASE + 0x10) |
||||
#define TCNT1 (TMU_BASE + 0x14) |
||||
#define TCR1 (TMU_BASE + 0x18) |
||||
#define TCOR2 (TMU_BASE + 0x1C) |
||||
#define TCNT2 (TMU_BASE + 0x20) |
||||
#define TCR2 (TMU_BASE + 0x24) |
||||
|
||||
/* TPU */ |
||||
#define TPU_BASE 0xA4480000 |
||||
#define TPU_TSTR (TPU_BASE + 0x00) |
||||
#define TPU_TCR0 (TPU_BASE + 0x10) |
||||
#define TPU_TMDR0 (TPU_BASE + 0x14) |
||||
#define TPU_TIOR0 (TPU_BASE + 0x18) |
||||
#define TPU_TIER0 (TPU_BASE + 0x1C) |
||||
#define TPU_TSR0 (TPU_BASE + 0x20) |
||||
#define TPU_TCNT0 (TPU_BASE + 0x24) |
||||
#define TPU_TGRA0 (TPU_BASE + 0x28) |
||||
#define TPU_TGRB0 (TPU_BASE + 0x2C) |
||||
#define TPU_TGRC0 (TPU_BASE + 0x30) |
||||
#define TPU_TGRD0 (TPU_BASE + 0x34) |
||||
#define TPU_TCR1 (TPU_BASE + 0x50) |
||||
#define TPU_TMDR1 (TPU_BASE + 0x54) |
||||
#define TPU_TIOR1 (TPU_BASE + 0x58) |
||||
#define TPU_TIER1 (TPU_BASE + 0x5C) |
||||
#define TPU_TSR1 (TPU_BASE + 0x60) |
||||
#define TPU_TCNT1 (TPU_BASE + 0x64) |
||||
#define TPU_TGRA1 (TPU_BASE + 0x68) |
||||
#define TPU_TGRB1 (TPU_BASE + 0x6C) |
||||
#define TPU_TGRC1 (TPU_BASE + 0x70) |
||||
#define TPU_TGRD1 (TPU_BASE + 0x74) |
||||
#define TPU_TCR2 (TPU_BASE + 0x90) |
||||
#define TPU_TMDR2 (TPU_BASE + 0x94) |
||||
#define TPU_TIOR2 (TPU_BASE + 0x98) |
||||
#define TPU_TIER2 (TPU_BASE + 0x9C) |
||||
#define TPU_TSR2 (TPU_BASE + 0xB0) |
||||
#define TPU_TCNT2 (TPU_BASE + 0xB4) |
||||
#define TPU_TGRA2 (TPU_BASE + 0xB8) |
||||
#define TPU_TGRB2 (TPU_BASE + 0xBC) |
||||
#define TPU_TGRC2 (TPU_BASE + 0xC0) |
||||
#define TPU_TGRD2 (TPU_BASE + 0xC4) |
||||
#define TPU_TCR3 (TPU_BASE + 0xD0) |
||||
#define TPU_TMDR3 (TPU_BASE + 0xD4) |
||||
#define TPU_TIOR3 (TPU_BASE + 0xD8) |
||||
#define TPU_TIER3 (TPU_BASE + 0xDC) |
||||
#define TPU_TSR3 (TPU_BASE + 0xE0) |
||||
#define TPU_TCNT3 (TPU_BASE + 0xE4) |
||||
#define TPU_TGRA3 (TPU_BASE + 0xE8) |
||||
#define TPU_TGRB3 (TPU_BASE + 0xEC) |
||||
#define TPU_TGRC3 (TPU_BASE + 0xF0) |
||||
#define TPU_TGRD3 (TPU_BASE + 0xF4) |
||||
|
||||
/* CMT */ |
||||
|
||||
/* SIOF */ |
||||
|
||||
/* SCIF */ |
||||
#define SCIF0_BASE 0xA4430000 |
||||
|
||||
/* SIM */ |
||||
|
||||
/* IrDA */ |
||||
|
||||
/* IIC */ |
||||
|
||||
/* LCDC */ |
||||
|
||||
/* USBF */ |
||||
|
||||
/* MMCIF */ |
||||
|
||||
/* PFC */ |
||||
#define PFC_BASE 0xA4050100 |
||||
#define PACR (PFC_BASE + 0x00) |
||||
#define PBCR (PFC_BASE + 0x02) |
||||
#define PCCR (PFC_BASE + 0x04) |
||||
#define PDCR (PFC_BASE + 0x06) |
||||
#define PECR (PFC_BASE + 0x08) |
||||
#define PFCR (PFC_BASE + 0x0A) |
||||
#define PGCR (PFC_BASE + 0x0C) |
||||
#define PHCR (PFC_BASE + 0x0E) |
||||
#define PJCR (PFC_BASE + 0x10) |
||||
#define PKCR (PFC_BASE + 0x12) |
||||
#define PLCR (PFC_BASE + 0x14) |
||||
#define PMCR (PFC_BASE + 0x16) |
||||
#define PPCR (PFC_BASE + 0x18) |
||||
#define PRCR (PFC_BASE + 0x1A) |
||||
#define PSCR (PFC_BASE + 0x1C) |
||||
#define PTCR (PFC_BASE + 0x1E) |
||||
#define PUCR (PFC_BASE + 0x20) |
||||
#define PVCR (PFC_BASE + 0x22) |
||||
#define PSELA (PFC_BASE + 0x24) |
||||
#define PSELB (PFC_BASE + 0x26) |
||||
#define PSELC (PFC_BASE + 0x28) |
||||
#define PSELD (PFC_BASE + 0x2A) |
||||
|
||||
/* I/O Port */ |
||||
|
||||
/* H-UDI */ |
||||
|
||||
#endif /* _ASM_CPU_SH7720_H_ */ |
Loading…
Reference in new issue