davinci: remove obsolete macro CONFIG_EMAC_MDIO_PHY_NUM

remove macro CONFIG_EMAC_MDIO_PHY_NUM and depending macro EMAC_MDIO_PHY_NUM
as they are no longer needed with the support for more than 1 PHYs in davinci
emac driver.

Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
master
Manjunath Hadli 13 years ago committed by Albert ARIBAUD
parent 062fe7d332
commit fb1d6332b5
  1. 6
      arch/arm/cpu/arm926ejs/davinci/et1011c.c
  2. 4
      arch/arm/include/asm/arch-davinci/emac_defs.h
  3. 14
      drivers/net/davinci_emac.c
  4. 1
      include/configs/da830evm.h
  5. 1
      include/configs/da850evm.h
  6. 1
      include/configs/davinci_dm365evm.h
  7. 1
      include/configs/davinci_dm6467evm.h
  8. 1
      include/configs/davinci_dvevm.h
  9. 1
      include/configs/davinci_schmoogie.h
  10. 1
      include/configs/davinci_sffsdr.h
  11. 1
      include/configs/davinci_sonata.h
  12. 1
      include/configs/ea20.h
  13. 1
      include/configs/hawkboard.h

@ -39,11 +39,9 @@ int et1011c_get_link_speed(int phy_addr)
u_int16_t data;
if (davinci_eth_phy_read(phy_addr, MII_STATUS_REG, &data) && (data & 0x04)) {
davinci_eth_phy_read(EMAC_MDIO_PHY_NUM,
MII_PHY_CONFIG_REG, &data);
davinci_eth_phy_read(phy_addr, MII_PHY_CONFIG_REG, &data);
/* Enable 125MHz clock sourced from PHY */
davinci_eth_phy_write(EMAC_MDIO_PHY_NUM,
MII_PHY_CONFIG_REG,
davinci_eth_phy_write(phy_addr, MII_PHY_CONFIG_REG,
data | PHY_SYS_CLK_EN);
return (1);
}

@ -84,10 +84,6 @@
#define EMAC_MDIO_CLOCK_FREQ 2000000 /* 2.0 MHz */
#endif
/* PHY mask - set only those phy number bits where phy is/can be connected */
#define EMAC_MDIO_PHY_NUM CONFIG_EMAC_MDIO_PHY_NUM
#define EMAC_MDIO_PHY_MASK (1 << EMAC_MDIO_PHY_NUM)
/* Ethernet Min/Max packet size */
#define EMAC_MIN_ETHERNET_PKT_SIZE 60
#define EMAC_MAX_ETHERNET_PKT_SIZE 1518

@ -48,9 +48,9 @@ unsigned int emac_dbg = 0;
#define debug_emac(fmt,args...) if (emac_dbg) printf(fmt,##args)
#ifdef DAVINCI_EMAC_GIG_ENABLE
#define emac_gigabit_enable() davinci_eth_gigabit_enable()
#define emac_gigabit_enable(phy_addr) davinci_eth_gigabit_enable(phy_addr)
#else
#define emac_gigabit_enable() /* no gigabit to enable */
#define emac_gigabit_enable(phy_addr) /* no gigabit to enable */
#endif
static void davinci_eth_mdio_enable(void);
@ -357,11 +357,11 @@ static int davinci_mii_phy_write(const char *devname, unsigned char addr, unsign
}
#endif
static void __attribute__((unused)) davinci_eth_gigabit_enable(void)
static void __attribute__((unused)) davinci_eth_gigabit_enable(int phy_addr)
{
u_int16_t data;
if (davinci_eth_phy_read(EMAC_MDIO_PHY_NUM, 0, &data)) {
if (davinci_eth_phy_read(phy_addr, 0, &data)) {
if (data & (1 << 6)) { /* speed selection MSB */
/*
* Check if link detected is giga-bit
@ -484,7 +484,7 @@ static int davinci_eth_open(struct eth_device *dev, bd_t *bis)
if (index == -1)
return(0);
emac_gigabit_enable();
emac_gigabit_enable(active_phy_addr[index]);
/* Start receive process */
writel((u_int32_t)emac_rx_desc, &adap_emac->RX0HDP);
@ -589,7 +589,7 @@ static int davinci_eth_send_packet (struct eth_device *dev,
return (ret_status);
}
emac_gigabit_enable();
emac_gigabit_enable(active_phy_addr[index]);
/* Check packet size and if < EMAC_MIN_ETHERNET_PKT_SIZE, pad it up */
if (length < EMAC_MIN_ETHERNET_PKT_SIZE) {
@ -614,7 +614,7 @@ static int davinci_eth_send_packet (struct eth_device *dev,
return (ret_status);
}
emac_gigabit_enable();
emac_gigabit_enable(active_phy_addr[index]);
if (readl(&adap_emac->TXINTSTATRAW) & 0x01) {
ret_status = length;

@ -87,7 +87,6 @@
* Network & Ethernet Configuration
*/
#ifdef CONFIG_DRIVER_TI_EMAC
#define CONFIG_EMAC_MDIO_PHY_NUM 1
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_DNS

@ -121,7 +121,6 @@
* Network & Ethernet Configuration
*/
#ifdef CONFIG_DRIVER_TI_EMAC
#define CONFIG_EMAC_MDIO_PHY_NUM 0
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_DNS

@ -57,7 +57,6 @@
/* Network Configuration */
#define CONFIG_DRIVER_TI_EMAC
#define CONFIG_EMAC_MDIO_PHY_NUM 0
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_DNS

@ -84,7 +84,6 @@ extern unsigned int davinci_arm_clk_get(void);
/* Network & Ethernet Configuration */
#define CONFIG_DRIVER_TI_EMAC
#define CONFIG_EMAC_MDIO_PHY_NUM 1
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_DNS

@ -102,7 +102,6 @@
/* Network & Ethernet Configuration */
/*==================================*/
#define CONFIG_DRIVER_TI_EMAC
#define CONFIG_EMAC_MDIO_PHY_NUM 1
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_DNS

@ -68,7 +68,6 @@
/* Network & Ethernet Configuration */
/*==================================*/
#define CONFIG_DRIVER_TI_EMAC
#define CONFIG_EMAC_MDIO_PHY_NUM 1
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_DNS

@ -65,7 +65,6 @@
#define CONFIG_SYS_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */
/* Network & Ethernet Configuration */
#define CONFIG_DRIVER_TI_EMAC
#define CONFIG_EMAC_MDIO_PHY_NUM 1
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_DNS

@ -101,7 +101,6 @@
/* Network & Ethernet Configuration */
/*==================================*/
#define CONFIG_DRIVER_TI_EMAC
#define CONFIG_EMAC_MDIO_PHY_NUM 1
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_DNS

@ -86,7 +86,6 @@
* Network & Ethernet Configuration
*/
#ifdef CONFIG_DRIVER_TI_EMAC
#define CONFIG_EMAC_MDIO_PHY_NUM 0
#define CONFIG_MII
#define CONFIG_BOOTP_DEFAULT
#define CONFIG_BOOTP_DNS

@ -83,7 +83,6 @@
/*
* Network & Ethernet Configuration
*/
#define CONFIG_EMAC_MDIO_PHY_NUM 0x7
#if !defined(CONFIG_NAND_SPL)
#define CONFIG_DRIVER_TI_EMAC
#endif

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