This patch adds documentation of device tree bindings for the STM32 ADC. It's based on linux-v4.18-rc* dt-bindings, at the time of writing: - Documentation/devicetree/bindings/iio/adc/st,stm32-adc.txt Signed-off-by: Fabrice Gasnier <fabrice.gasnier@st.com> Reviewed-by: Simon Glass <sjg@chromium.org>lime2-spi
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STMicroelectronics STM32 ADC device |
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STM32 ADC is a successive approximation analog-to-digital converter. |
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It has several multiplexed input channels. Conversions can be performed |
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in single, continuous, scan or discontinuous mode. Result of the ADC is |
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stored in a left-aligned or right-aligned 32-bit data register. |
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Conversions can be launched in software or using hardware triggers. |
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The analog watchdog feature allows the application to detect if the input |
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voltage goes beyond the user-defined, higher or lower thresholds. |
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Each STM32 ADC block can have up to 3 ADC instances. |
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Each instance supports two contexts to manage conversions, each one has its |
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own configurable sequence and trigger: |
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- regular conversion can be done in sequence, running in background |
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- injected conversions have higher priority, and so have the ability to |
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interrupt regular conversion sequence (either triggered in SW or HW). |
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Regular sequence is resumed, in case it has been interrupted. |
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Contents of a stm32 adc root node: |
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----------------------------------- |
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Required properties: |
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- compatible: Should be one of: |
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"st,stm32f4-adc-core" |
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"st,stm32h7-adc-core" |
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"st,stm32mp1-adc-core" |
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- reg: Offset and length of the ADC block register set. |
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- interrupts: One or more interrupts for ADC block. Some parts like stm32f4 |
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and stm32h7 share a common ADC interrupt line. stm32mp1 has two separate |
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interrupt lines, one for each ADC within ADC block. |
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- clocks: Core can use up to two clocks, depending on part used: |
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- "adc" clock: for the analog circuitry, common to all ADCs. |
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It's required on stm32f4. |
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It's optional on stm32h7. |
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- "bus" clock: for registers access, common to all ADCs. |
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It's not present on stm32f4. |
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It's required on stm32h7. |
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- clock-names: Must be "adc" and/or "bus" depending on part used. |
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- interrupt-controller: Identifies the controller node as interrupt-parent |
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- vref-supply: Phandle to the vref input analog reference voltage. |
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- #interrupt-cells = <1>; |
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- #address-cells = <1>; |
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- #size-cells = <0>; |
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Optional properties: |
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- A pinctrl state named "default" for each ADC channel may be defined to set |
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inX ADC pins in mode of operation for analog input on external pin. |
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Contents of a stm32 adc child node: |
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----------------------------------- |
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An ADC block node should contain at least one subnode, representing an |
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ADC instance available on the machine. |
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Required properties: |
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- compatible: Should be one of: |
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"st,stm32f4-adc" |
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"st,stm32h7-adc" |
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"st,stm32mp1-adc" |
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- reg: Offset of ADC instance in ADC block (e.g. may be 0x0, 0x100, 0x200). |
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- clocks: Input clock private to this ADC instance. It's required only on |
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stm32f4, that has per instance clock input for registers access. |
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- interrupt-parent: Phandle to the parent interrupt controller. |
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- interrupts: IRQ Line for the ADC (e.g. may be 0 for adc@0, 1 for adc@100 or |
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2 for adc@200). |
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- st,adc-channels: List of single-ended channels muxed for this ADC. |
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It can have up to 16 channels on stm32f4 or 20 channels on stm32h7, numbered |
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from 0 to 15 or 19 (resp. for in0..in15 or in0..in19). |
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- st,adc-diff-channels: List of differential channels muxed for this ADC. |
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Depending on part used, some channels can be configured as differential |
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instead of single-ended (e.g. stm32h7). List here positive and negative |
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inputs pairs as <vinp vinn>, <vinp vinn>,... vinp and vinn are numbered |
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from 0 to 19 on stm32h7) |
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Note: At least one of "st,adc-channels" or "st,adc-diff-channels" is required. |
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Both properties can be used together. Some channels can be used as |
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single-ended and some other ones as differential (mixed). But channels |
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can't be configured both as single-ended and differential (invalid). |
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- #io-channel-cells = <1>: See the IIO bindings section "IIO consumers" in |
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Documentation/devicetree/bindings/iio/iio-bindings.txt |
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Optional properties: |
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- dmas: Phandle to dma channel for this ADC instance. |
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See ../../dma/dma.txt for details. |
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- dma-names: Must be "rx" when dmas property is being used. |
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- assigned-resolution-bits: Resolution (bits) to use for conversions. Must |
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match device available resolutions: |
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* can be 6, 8, 10 or 12 on stm32f4 |
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* can be 8, 10, 12, 14 or 16 on stm32h7 |
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Default is maximum resolution if unset. |
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- st,min-sample-time-nsecs: Minimum sampling time in nanoseconds. |
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Depending on hardware (board) e.g. high/low analog input source impedance, |
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fine tune of ADC sampling time may be recommended. |
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This can be either one value or an array that matches 'st,adc-channels' list, |
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to set sample time resp. for all channels, or independently for each channel. |
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Example: |
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adc: adc@40012000 { |
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compatible = "st,stm32f4-adc-core"; |
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reg = <0x40012000 0x400>; |
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interrupts = <18>; |
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clocks = <&rcc 0 168>; |
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clock-names = "adc"; |
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vref-supply = <®_vref>; |
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interrupt-controller; |
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pinctrl-names = "default"; |
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pinctrl-0 = <&adc3_in8_pin>; |
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#interrupt-cells = <1>; |
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#address-cells = <1>; |
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#size-cells = <0>; |
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adc@0 { |
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compatible = "st,stm32f4-adc"; |
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#io-channel-cells = <1>; |
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reg = <0x0>; |
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clocks = <&rcc 0 168>; |
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interrupt-parent = <&adc>; |
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interrupts = <0>; |
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st,adc-channels = <8>; |
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dmas = <&dma2 0 0 0x400 0x0>; |
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dma-names = "rx"; |
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assigned-resolution-bits = <8>; |
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}; |
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... |
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other adc child nodes follow... |
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}; |
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Example to setup: |
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- channel 1 as single-ended |
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- channels 2 & 3 as differential (with resp. 6 & 7 negative inputs) |
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adc: adc@40022000 { |
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compatible = "st,stm32h7-adc-core"; |
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... |
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adc1: adc@0 { |
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compatible = "st,stm32h7-adc"; |
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... |
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st,adc-channels = <1>; |
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st,adc-diff-channels = <2 6>, <3 7>; |
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}; |
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}; |
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