This patch splits qfw command interface and qfw core function into two files, and introduces a new Kconfig option (CONFIG_QFW) for qfw core. Now when qfw command interface is enabled, it will automatically select qfw core. This patch also makes the ACPI table generation select CONFIG_QFW. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>master
Miao Yan
8 years ago
committed by
Bin Meng
parent
d3ad062392
commit
fcf5c04193
@ -0,0 +1,184 @@ |
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/*
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* (C) Copyright 2015 Miao Yan <yanmiaobest@gmail.com> |
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* |
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* SPDX-License-Identifier: GPL-2.0+ |
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*/ |
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#include <common.h> |
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#include <command.h> |
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#include <errno.h> |
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#include <malloc.h> |
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#include <qemu_fw_cfg.h> |
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#include <asm/io.h> |
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#include <linux/list.h> |
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static bool fwcfg_present; |
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static bool fwcfg_dma_present; |
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static LIST_HEAD(fw_list); |
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/* Read configuration item using fw_cfg PIO interface */ |
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static void qemu_fwcfg_read_entry_pio(uint16_t entry, |
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uint32_t size, void *address) |
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{ |
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uint32_t i = 0; |
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uint8_t *data = address; |
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/*
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* writting FW_CFG_INVALID will cause read operation to resume at |
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* last offset, otherwise read will start at offset 0 |
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*/ |
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if (entry != FW_CFG_INVALID) |
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outw(entry, FW_CONTROL_PORT); |
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while (size--) |
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data[i++] = inb(FW_DATA_PORT); |
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} |
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/* Read configuration item using fw_cfg DMA interface */ |
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static void qemu_fwcfg_read_entry_dma(uint16_t entry, |
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uint32_t size, void *address) |
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{ |
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struct fw_cfg_dma_access dma; |
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dma.length = cpu_to_be32(size); |
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dma.address = cpu_to_be64((uintptr_t)address); |
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dma.control = cpu_to_be32(FW_CFG_DMA_READ); |
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/*
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* writting FW_CFG_INVALID will cause read operation to resume at |
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* last offset, otherwise read will start at offset 0 |
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*/ |
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if (entry != FW_CFG_INVALID) |
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dma.control |= cpu_to_be32(FW_CFG_DMA_SELECT | (entry << 16)); |
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barrier(); |
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debug("qemu_fwcfg_dma_read_entry: addr %p, length %u control 0x%x\n", |
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address, size, be32_to_cpu(dma.control)); |
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outl(cpu_to_be32((uint32_t)&dma), FW_DMA_PORT_HIGH); |
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while (be32_to_cpu(dma.control) & ~FW_CFG_DMA_ERROR) |
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__asm__ __volatile__ ("pause"); |
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} |
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bool qemu_fwcfg_present(void) |
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{ |
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return fwcfg_present; |
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} |
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bool qemu_fwcfg_dma_present(void) |
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{ |
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return fwcfg_dma_present; |
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} |
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void qemu_fwcfg_read_entry(uint16_t entry, uint32_t length, void *address) |
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{ |
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if (fwcfg_dma_present) |
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qemu_fwcfg_read_entry_dma(entry, length, address); |
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else |
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qemu_fwcfg_read_entry_pio(entry, length, address); |
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} |
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int qemu_fwcfg_online_cpus(void) |
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{ |
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uint16_t nb_cpus; |
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if (!fwcfg_present) |
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return -ENODEV; |
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qemu_fwcfg_read_entry(FW_CFG_NB_CPUS, 2, &nb_cpus); |
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return le16_to_cpu(nb_cpus); |
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} |
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int qemu_fwcfg_read_firmware_list(void) |
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{ |
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int i; |
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uint32_t count; |
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struct fw_file *file; |
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struct list_head *entry; |
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/* don't read it twice */ |
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if (!list_empty(&fw_list)) |
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return 0; |
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qemu_fwcfg_read_entry(FW_CFG_FILE_DIR, 4, &count); |
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if (!count) |
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return 0; |
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count = be32_to_cpu(count); |
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for (i = 0; i < count; i++) { |
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file = malloc(sizeof(*file)); |
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if (!file) { |
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printf("error: allocating resource\n"); |
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goto err; |
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} |
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qemu_fwcfg_read_entry(FW_CFG_INVALID, |
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sizeof(struct fw_cfg_file), &file->cfg); |
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file->addr = 0; |
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list_add_tail(&file->list, &fw_list); |
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} |
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return 0; |
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err: |
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list_for_each(entry, &fw_list) { |
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file = list_entry(entry, struct fw_file, list); |
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free(file); |
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} |
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return -ENOMEM; |
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} |
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struct fw_file *qemu_fwcfg_find_file(const char *name) |
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{ |
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struct list_head *entry; |
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struct fw_file *file; |
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list_for_each(entry, &fw_list) { |
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file = list_entry(entry, struct fw_file, list); |
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if (!strcmp(file->cfg.name, name)) |
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return file; |
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} |
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return NULL; |
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} |
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struct fw_file *qemu_fwcfg_file_iter_init(struct fw_cfg_file_iter *iter) |
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{ |
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iter->entry = fw_list.next; |
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return list_entry((struct list_head *)iter->entry, |
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struct fw_file, list); |
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} |
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struct fw_file *qemu_fwcfg_file_iter_next(struct fw_cfg_file_iter *iter) |
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{ |
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iter->entry = ((struct list_head *)iter->entry)->next; |
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return list_entry((struct list_head *)iter->entry, |
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struct fw_file, list); |
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} |
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bool qemu_fwcfg_file_iter_end(struct fw_cfg_file_iter *iter) |
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{ |
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return iter->entry == &fw_list; |
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} |
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void qemu_fwcfg_init(void) |
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{ |
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uint32_t qemu; |
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uint32_t dma_enabled; |
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fwcfg_present = false; |
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fwcfg_dma_present = false; |
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qemu_fwcfg_read_entry_pio(FW_CFG_SIGNATURE, 4, &qemu); |
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if (be32_to_cpu(qemu) == QEMU_FW_CFG_SIGNATURE) |
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fwcfg_present = true; |
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if (fwcfg_present) { |
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qemu_fwcfg_read_entry_pio(FW_CFG_ID, 1, &dma_enabled); |
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if (dma_enabled & FW_CFG_DMA_ENABLED) |
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fwcfg_dma_present = true; |
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} |
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} |
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