x86: Conditionally build the pinctrl_ich6 driver

The pinctrl_ich6 driver is currently unconditionally built for all
x86 boards. Let's use a Kconfig option to control the build.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
lime2-spi
Bin Meng 7 years ago
parent 594d089c8a
commit fcfc8a82b1
  1. 6
      arch/x86/Kconfig
  2. 1
      arch/x86/cpu/baytrail/Kconfig
  3. 1
      arch/x86/cpu/ivybridge/Kconfig
  4. 2
      arch/x86/lib/Makefile

@ -735,6 +735,12 @@ config I8259_PIC
slave) interrupt controllers. Include this to have U-Boot set up slave) interrupt controllers. Include this to have U-Boot set up
the interrupt correctly. the interrupt correctly.
config PINCTRL_ICH6
bool
help
Intel ICH6 compatible chipset pinctrl driver. It needs to work
together with the ICH6 compatible gpio driver.
config I8254_TIMER config I8254_TIMER
bool bool
default y default y

@ -12,6 +12,7 @@ config INTEL_BAYTRAIL
imply AHCI_PCI imply AHCI_PCI
imply ICH_SPI imply ICH_SPI
imply INTEL_ICH6_GPIO imply INTEL_ICH6_GPIO
imply PINCTRL_ICH6
imply MMC imply MMC
imply MMC_PCI imply MMC_PCI
imply MMC_SDHCI imply MMC_SDHCI

@ -13,6 +13,7 @@ config NORTHBRIDGE_INTEL_IVYBRIDGE
imply AHCI_PCI imply AHCI_PCI
imply ICH_SPI imply ICH_SPI
imply INTEL_ICH6_GPIO imply INTEL_ICH6_GPIO
imply PINCTRL_ICH6
imply SCSI imply SCSI
imply SCSI_AHCI imply SCSI_AHCI
imply SPI_FLASH imply SPI_FLASH

@ -24,7 +24,7 @@ obj-$(CONFIG_ENABLE_MRC_CACHE) += mrccache.o
obj-y += northbridge-uclass.o obj-y += northbridge-uclass.o
obj-$(CONFIG_I8259_PIC) += i8259.o obj-$(CONFIG_I8259_PIC) += i8259.o
obj-$(CONFIG_I8254_TIMER) += i8254.o obj-$(CONFIG_I8254_TIMER) += i8254.o
obj-y += pinctrl_ich6.o obj-$(CONFIG_PINCTRL_ICH6) += pinctrl_ich6.o
obj-y += pirq_routing.o obj-y += pirq_routing.o
obj-y += relocate.o obj-y += relocate.o
obj-y += physmem.o obj-y += physmem.o

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