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@ -45,7 +45,7 @@ static inline int gpt_has_clk_source_osc(void) |
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#if defined(CONFIG_MX6) |
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if (((is_mx6dq()) && (soc_rev() > CHIP_REV_1_0)) || |
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is_mx6dqp() || is_mx6sdl() || is_mx6sx() || is_mx6ul() || |
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is_mx6ull()) |
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is_mx6ull() || is_mx6sll()) |
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return 1; |
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return 0; |
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@ -84,8 +84,12 @@ int timer_init(void) |
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if (gpt_has_clk_source_osc()) { |
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i |= GPTCR_CLKSOURCE_OSC | GPTCR_TEN; |
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/* For DL/S, SX, UL, ULL set 24Mhz OSC Enable bit and prescaler */ |
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if (is_mx6sdl() || is_mx6sx() || is_mx6ul() || is_mx6ull()) { |
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/*
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* For DL/S, SX, UL, ULL, SLL set 24Mhz OSC |
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* Enable bit and prescaler |
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*/ |
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if (is_mx6sdl() || is_mx6sx() || is_mx6ul() || is_mx6ull() || |
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is_mx6sll()) { |
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i |= GPTCR_24MEN; |
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/* Produce 3Mhz clock */ |
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