2 Commits (11c45ebd46d6517b51b7a92dd52a618b2f4e5586)

Author	SHA1	Message	Date
Stefan Roese	3db93b8bed	ppc4xx: Enable CPU POST test for 4xx with dcache enabled ... Now with caches enabled (i- and d-cache) on 44x, we need a chance to disable the cache for the CPU POST tests, since these tests consist of self modifying code. This is done via the new change_tlb() function. Signed-off-by: Stefan Roese <sr@denx.de>	18 years ago
Wolfgang Denk	ad5bb451ad	Restructure POST directory to support of other CPUs, boards, etc.	19 years ago
wdenk	51152c173d	Fix watchdog reset problems on LWMON board	20 years ago
wdenk	ea909b7604	* Added support for both PCMCIA slots (at the same time!) on MPC8xx ... * Patch by Rod Boyce, 21 Nov 2002: fix PCMCIA on MBX8xx board * Patch by Pierre Aubert , 21 Nov 2002 Add CFG_CPM_POST_WORD_ADDR to make the offset of the bootmode word in DPRAM configurable	23 years ago
wdenk	c609719b8d	Initial revision	23 years ago