Discard MX6UL from CONFIG_SYS_EXTRA_OPTIONS, since we default
select MX6UL for mx6ul_14x14_evk board.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
There is no need to expose SoC choice to user, we already got
the SoC according to the build target. So default "select MX6UL"
for MX6UL_14x14_EVK target.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
To i.MX6UL, SYS_L2CACHE_OFF is selected, but there is no Kconfig entry
for SYS_L2CACHE_OFF. Then "select SYS_L2CACHE_OFF" does not effect for
i.MX6UL, which is not expected.
Since SYS_L2CACHE_OFF is mainly used by ARM architecture, add it to
arch/arm/Kconfig.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@konsulko.com>
Cc: Stefano Babic <sbabic@denx.de>
Add SPL boot support for mx6slevk board.
1. Introduce a configuration file mx6slevk_spl_defconfig.
2. i.MX6SL has same DRAM space with i.MX6SX, need to change SPL DRAM SPACE.
3. Include imx6_spl.h and related SPL macro in mx6slevk.h.
4. select SUPPORT_SPL for TARGET_MX6SLEVK.
5. Add SPL board code to do related initialization.
Boot Log:
U-Boot SPL 2015.07-00544-g1594a76 (Aug 17 2015 - 01:56:59)
reading u-boot.img
reading u-boot.img
U-Boot 2015.07-00544-g1594a76 (Aug 17 2015 - 01:56:59 +0000)
CPU: Freescale i.MX6SL rev1.2 996 MHz (running at 396 MHz)
CPU: Commercial temperature grade (0C to 95C) at 50C
Reset cause: POR
Board: MX6SLEVK
I2C: ready
DRAM: 1 GiB
PMIC: PFUZE100 ID=0x10
MMC: FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
*** Warning - bad CRC, using default environment
In: serial
Out: serial
Err: serial
Net: FEC [PRIME]
Hit any key to stop autoboot: 0
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Add LPDDR2 support:
1. Implement a function mx6_lpddr2_cfg to initialize MMDC for LPDDR2.
2. Introduce a structure mx6_lpddr2_cfg, most entrys are same to
mx6_ddr3_cfg, but still keep it a single one for easy to choose
parameters for LPDDR2.
3. If ddr_type is LPDDR2, use mx6_lpddr2_cfg to init MMDC.
4. Update comments.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
To i.MX6, DDR3 and LPDDR2 is supported, so rename function mx6_dram_cfg
to mx6_ddr3_cfg and the original mx6_dram_cfg function only is a wrapper.
The new reimplemented function mx6_dram_cfg only invokes mx6_ddr3_cfg
when ddr_type is for DDR3. Later we can use ddr_type to initialize
MMDC for LPDDR2.
Initialize ddr_type for different boards which enable SPL.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Reviewed-by: Stefan Roese <sr@denx.de>
Add ddr_type entry for mx6_ddr_sysinfo. It will be used for
differenrate DDR3 and LPDDR2.
Introduce an enum type for ddr_type.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Add mpzqlp2ctl entry for mx6_mmdc_calibration.
MMDC_MPZQLP2CTL register is for init tZQINIT, tZQCL, tZQCS for LPDDR2 chips.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Define two structure mx6sl_iomux_ddr_regs and mx6sl_iomux_grp_regs.
Add a new function mx6sl_dram_iocfg to configure dram io.
Add header file to define macros for register address.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
To Chip density 4Gb, tRFC should be 300ns, see
"Table 61 — Refresh parameters by device density" of JESD79-3E.
tXS(min) is max(5nCK, tRFC(min) + 10ns).
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
i.MX 6SoloLite only supports MMDC0, so do not access MMDC1 for i.MX 6SL.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Extend the documentation of the fec_mxc configuration by describing its
ability to read the ethaddr MAC address from the SoC eFuses.
Also add an example how to program the fuses for an imx5 to clarify the
byte order.
Cc: Stefano Babic <sbabic at denx.de>
Cc: Marek Vasut <marex at denx.de>
Signed-off-by: Olaf Mandel <o.mandel at menlosystems.com>
some small updates for the aristainetos boards:
- fix display timings for the aristainetos board
- fix pinmux for the aristainetos board
- fix pinmux for the aristainetos2 board
- fix default environment
Signed-off-by: Heiko Schocher <hs@denx.de>
* Ocotp of i.MX7D has different operation rule.
This patch is to add support for i.MX7D ocotp.
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
* Add mxc_gpio support for imx7d SoC
* Use CONFIG_MX7 to extend mxc gpio driver support for imx7d
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
* Add imx7d support for iomux controller
* imx7d has two iomux controllers iomuxc (0x3033000) and iomuxc-lpsr
(0x302C0000) each conroller provides control and mux mode pad
registers but shares iomuxc input select register with iomuxc-lpsr
IOMUX_CONFIG_LPSR flag is used to properly set daisy chain settings
for iomuxc-lpsr pads.
* Since mx7d introduces LPSR IOMUX pins, add new base to IOMUX v3
driver for these LPSR pins.
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Signed-off-by: Fugang Duan <B38611@freescale.com>
Signed-off-by: Ye.Li <B37916@freescale.com>
* Add pmic pfuze3000 support, implement power_pfuze3000_init to be
used in power_init_board callback function.
Signed-off-by: Adrian Alonso <aalonso@freescale.com>
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
The MIB RAM and FIFO receive start register does not exist on
i.MX6UL. Accessing these register will cause enet not work well.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Signed-off-by: Fugang Duan <B38611@freescale.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Stefano Babic <sbabic@denx.de>
To i.MX6SX/UL, two ethernet interfaces are supported.
Add ENET2 clock support:
1. Introduce a new input parameter "fec_id", only 0 and 1 are allowed.
To value 1, only i.MX6SX/UL can pass the check.
2. Modify board code who use this api to follow new api prototype.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Nikolaos Pasaloukos <Nikolaos.Pasaloukos@imgtec.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Move most macro definitions and prototypes into
"arch/arm/include/asm/imx-common/sys_proto.h" to avoid duplicated
function prototypes and marco definitions for different i.MX SoCs.
This patch do not remove the sys_proto.h for different i.MX SoCs,
because we need to modify lots of driver code and others. This patch
remove duplicated macros and prototypes and incude "sys_proto.h"
of imx-common for each sys_proto.h of different i.MX platforms.
Then later we should avoid add stuff in sys_proto.h of each platform,
and modify driver to include common sys_proto.h.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Rewrite get_cpu_rev, from "static const char *get_cpu_rev(void)" to
"u32 get_cpu_rev(void)". To align with get_cpu_rev of other i.MXes.
Also write get_imx_type to replace get_cpu_type, since we have
macro named get_cpu_type.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Use new formula for get_cpu_rev, since we need to use this formula
to do runtime check for all i.MXes.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Implement get_cpu_rev to support runtime check using is_cpu_type.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Move TARGET_xx Kconfig option based on mx6 to arch/arm/cpu/armv7/mx6/Kconfig.
Add enable "CONFIG_ARCH_MX6" for boards based on mx6.
Then we can choose target boards using "make ARCH=arm menuconfig"
with ARCH_MX6 defined.
If using original way, we have no chance to enable ARCH_MX6 when
"make menuconfig". Even define CONFIG_ARCH_MX6=y in xx_defconfig,
kconfig will complains "arch/../configs/platinum_titanium_defconfig:3:
warning: override: TARGET_PLATINUM_TITANIUM changes choice state"
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Heiko Schocher <hs@denx.de>
Cc: Tim Harvey <tharvey@gateworks.com>
Cc: Eric Bénard <eric@eukrea.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Eric Nelson <eric.nelson@boundarydevices.com>
Cc: Marek Vasut <marex@denx.de>
Cc: Christian Gmeiner <christian.gmeiner@gmail.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Soeren Moch <smoch@web.de>
Cc: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Stefano Babic <sbabic@denx.de>
Acked-by: Soeren Moch <smoch@web.de>
Acked-by: Otavio Salvador <otavio@ossystems.com.br>
Acked-by: Christian Gmeiner <christian.gmeiner@gmail.com>
When the original HBUS divider value is retrieved in mxs_ocotp_scale_hclk()
for the purpose or restoring it back later, the value is not shifted by the
HBUS divider offset in that register. This is not a problem, since the shift
is zero on all MXS hardware. Add the shift anyway, for completeness and in
case FSL ever decides to re-use this driver on future designs.
Signed-off-by: Chris Smith <chris@zxdesign.info>
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
This commit adds ethernet support to the TS4800. Note that the
MAC address is not fused on this board and have to be read from
FEC PALR PAUR registers (this is how the kernel provided by
Technologic Systems does it).
signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
Cc: Stefano Babic <sbabic@denx.de>
This commit adds basic support including:
MMC, Serial console, TS4800 watchdog
The config use CONFIG_SKIP_LOWLEVEL_INIT as U-boot is used as a second
stage bootloader.
Signed-off-by: Lucile Quirion <lucile.quirion@savoirfairelinux.com>
signed-off-by: Damien Riegel <damien.riegel@savoirfairelinux.com>
Cc: Stefano Babic <sbabic@denx.de>
Troy Kisky will be maintaining the Nitrogen6x board going forward.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Acked-by: Troy Kisky <troy.kisky@boundarydevices.com>
cgtqmx6eval can be populated with a AR8035 or KSZ9031 depending on the
board revision.
Add Ethernet support.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Remove this ad-hoc mkimage invocation in MXS Makefile and replace
it with the standard mkimage rule instead.
This patch fixes recent build issues introduced by the patch
92a655c mkimage: Set up a file size parameter and keep it updated
These build issues could be triggered by building for example the
MX28EVK and the u-boot.sb image:
$ make mx28evk_defconfig
$ make V=1 u-boot.sb
[...]
make -f ./scripts/Makefile.build obj=arch/arm/cpu/arm926ejs/mxs u-boot.sb
./tools/mkimage -n arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg -T mxsimage u-boot.sb
./tools/mkimage: Can't open (null): Bad address
arch/arm/cpu/arm926ejs/mxs/Makefile:82: recipe for target 'u-boot.sb' failed
make[1]: *** [u-boot.sb] Error 1
Makefile:989: recipe for target 'u-boot.sb' failed
make: *** [u-boot.sb] Error 2
With this patch:
./tools/mkimage -n arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg -T mxsimage -d arch/arm/cpu/arm926ejs/mxs/mxsimage.mx28.cfg u-boot.sb
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Simon Glass <sjg@chromium.org>
Cc: Juha Lumme <juha.lumme@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
For pages of 2048 bytes the current setting of the ECC Error Correction Level
is only true for an oob size of 64 bytes and wrong for all others.
Instead of hard-coding every possible combination of page size and oob size use
the dynamic calculation of the ECC strength introduced in commit
6121560d77.
Cc: Marek Vasut <marex@denx.de>
Signed-off-by: Jörg Krause <joerg.krause@embedded.rocks>
Acked-by: Marek Vasut <marex@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
Discard CONFIG_MX6 in mx6ul_14x14_evk.h, since it is already defined
in mx6_common.h.
Tested on mx6ul_14x14_evk board.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Reviewed-by: Stefano Babic <sbabic@denx.de>
This patch removes the SPI support from the WRU-IV baseboard as its
not used at all.
Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Clemens Gruber <clemens.gruber@pqgruber.com>
Cc: Markus Niebel <Markus.Niebel@tq-group.com>
Cc: Stefano Babic <sbabic@denx.de>
Tested-by: Clemens Gruber <clemens.gruber@pqgruber.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Currently we need to build one U-boot image for each of the udoo
variants: quad and dual-lite.
By switching to SPL we can support all two variants with a single binary.
Based on the SPL for wandboard.
Tested with OpenELEC (Open Embedded Linux Entertainment Center)
on both boards.
Signed-off-by: Peter Vicman <peter.vicman@gmail.com>
Cc: Fabio Estevam <fabio.estevam@freescale.com>
Cc: Stefano Babic <sbabic@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Peter Vicman <peter.vicman@gmail.com>
Acked-by: Fabio Estevam <fabio.estevam@freescale.com>
When dcd_len is 0 the Write Data command that the set_dcd_rst_v2() routine
generates is empty. This causes HAB to complain that the command is invalid.
--------- HAB Event 1 -----------------
event data:
0xdb 0x00 0x0c 0x41 0x33 0x06 0xc0 0x00
0xcc 0x00 0x04 0x04
To fix this set the DCD pointer in the IVT to NULL in this case. The DCD header
itself is still needed for detect_imximage_version() to determine the image
version.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Acked-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
This should depend on SPL_OF_CONTROL (it is not equivalent to
SPL && OF_CONTROL).
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
This driver actually does nothing but test pinctrl uclass, and
demonstrate how things work.
To try this driver, uncomment /* #define DEBUG */ in the
drivers/pinctrl/pinctrl-sandbox.c, and debug messages will be
displayed.
DRAM: 128 MiB
sandbox pinmux: group = 1 (serial_a), function = 1 (serial)
Using default environment
In: cros-ec-keyb
Out: lcd
Err: lcd
Net: Net Initialization Skipped
eth0: eth@10002000, eth1: eth@80000000, eth5: eth@90000000
=> i2c dev 0
Setting bus to 0
sandbox pinmux: group = 0 (i2c), function = 0 (i2c)
sandbox pinconf: group = 0 (i2c), param = 3, arg = 1
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
This creates a new framework for handling of pin control devices,
i.e. devices that control different aspects of package pins.
This uclass handles pinmuxing and pin configuration; pinmuxing
controls switching among silicon blocks that share certain physical
pins, pin configuration handles electronic properties such as pin-
biasing, load capacitance etc.
This framework can support the same device tree bindings, but if you
do not need full interface support, you can disable some features to
reduce memory foot print. Typically around 1.5KB is necessary to
include full-featured uclass support on ARM board (CONFIG_PINCTRL +
CONFIG_PINCTRL_FULL + CONFIG_PINCTRL_GENERIC + CONFIG_PINCTRL_PINMUX),
for example.
We are often limited on code size for SPL. Besides, we still have
many boards that do not support device tree configuration. The full
pinctrl, which requires OF_CONTROL, does not make sense for those
boards. So, this framework also has a Do-It-Yourself (let's say
simple pinctrl) interface. With CONFIG_PINCTRL_FULL disabled, the
uclass itself provides no systematic mechanism for identifying the
peripheral device, applying pinctrl settings, etc. They must be
done in each low-level driver. In return, you can save much memory
footprint and it might be useful especially for SPL.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
This is useful when we want to bind a device, but do not need the
pointer to the device.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
Peng Fan
Soeren Moch
Olaf Mandel
Heiko Schocher
Adrian Alonso
Chris Smith
Damien Riegel
Lucile Quirion
Eric Nelson
Otavio Salvador
Marek Vasut
Jörg Krause
Stefan Roese
vpeter4
Baruch Siach
Tom Rini
Boris Brezillon
Masahiro Yamada