u-boot

Commit Graph

Author	SHA1	Message	Date
Tom Warren	d0edce4fa3	Tegra: Configure L2 cache control reg properly. Without this change, kernel fails at calling function cache_clean_flush during kernel early boot. Aprocryphally, intended for T114 only, so I check for a T114 SoC. Works (i.e. dalmore 3.8 kernel now starts printing to console). Signed-off-by: Tom Warren <twarren@nvidia.com>	12 years ago

Author

SHA1

Message

Date

Tom Warren

d0edce4fa3

Tegra: Configure L2 cache control reg properly.

Without this change, kernel fails at calling function cache_clean_flush
during kernel early boot.

Aprocryphally, intended for T114 only, so I check for a T114 SoC.
Works (i.e. dalmore 3.8 kernel now starts printing to console).

Signed-off-by: Tom Warren <twarren@nvidia.com>

12 years ago

1 Commits (293eb33fcb95e2b2bae71edf97b0ca3bdd6ba98d)