u-boot

Commit Graph

Author	SHA1	Message	Date
Purna Chandra Mandal	9ffa7a35ef	drivers: ddr: Add DDR2 SDRAM controller driver for Microchip PIC32. This driver initializes PIC32 DDR2 SDRAM controller and internal DDR2 Phy module. DDR2 controller operates in half-rate mode (upto 533MHZ frequency). Signed-off-by: Paul Thacker <paul.thacker@microchip.com> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>	10 years ago

Author

SHA1

Message

Date

Purna Chandra Mandal

9ffa7a35ef

drivers: ddr: Add DDR2 SDRAM controller driver for Microchip PIC32.

This driver initializes PIC32 DDR2 SDRAM controller and internal DDR2 Phy module.
DDR2 controller operates in half-rate mode (upto 533MHZ frequency).

Signed-off-by: Paul Thacker <paul.thacker@microchip.com>
Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

10 years ago

1 Commits (3b19c1dbe0464d1cdf3b3006042cc75bc439321f)