Now with caches enabled (i- and d-cache) on 44x, we need a chance to
disable the cache for the CPU POST tests, since these tests consist
of self modifying code. This is done via the new change_tlb() function.
Signed-off-by: Stefan Roese <sr@denx.de>
* Patch by Rod Boyce, 21 Nov 2002:
fix PCMCIA on MBX8xx board
* Patch by Pierre Aubert , 21 Nov 2002
Add CFG_CPM_POST_WORD_ADDR to make the offset of the
bootmode word in DPRAM configurable
Yuri Tikhonov
Stefan Roese
Wolfgang Denk
wdenk