Quark SoC holds the PCIe controller in reset following a power on.
U-Boot needs to release the PCIe controller from reset. The PCIe
controller (D23:F0/F1) will not be visible in PCI configuration
space and any access to its PCI configuration registers will cause
system hang while it is held in reset.
Enable PCIe controller per Quark firmware writer guide.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
If we convert to use driver model pci on quark, we will encounter
some chicken and egg problems like below:
- To enable PCIe root ports, we need program some registers on the
message bus via pci bus. With driver model, the first time to
access pci bus, the pci enumeration process will be triggered.
But without first enabling PCIe root ports, pci enumeration
just hangs when scanning PCIe root ports.
- Similar situation happens when trying to access GPIO from the
PCIe enabling codes, as GPIO requires its block base address
to be assigned via a pci configuration register in the bridge.
To avoid such dilemma, replace all pci calls in the quark codes
to use the local version which does not go through driver model.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Intel Quark SoC has a low end x86 processor with only 400MHz
frequency. Currently it takes about 15 seconds for U-Boot to
boot to shell and the most time consuming part is with MRC,
which is about 12 seconds. MRC programs lots of registers on
the SoC internal message bus indirectly accessed via pci bus.
To speed up the boot, create an optimized version of pci config
read/write dword routines which directly operate on PCI I/O ports.
These two routines are inlined to provide better performance too.
Now it only takes about 3 seconds to finish MRC, which is really
fast (4 times faster than before).
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
At present, until a PCI bus is probed, it cannot be found by its sequence
number unless it has an alias. This is the same with any device.
However with PCI this is more annoying than usual, since bus 0 is always the
same device.
Add a function that tries a little harder to locate PCI bus 0. This means
that PCI enumeration will happen automatically on the first access.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
At present buildman can compare configurations between commits but the
feature is less useful than it could be. There is no summary by architecture
and changes are not reported on a per-board basis.
Correct these deficiencies so that it is possible to see exactly what is
changing for any number of boards.
Note that 'buildman -b <branch> -C' is recommended for any build where you
will be comparing configuration. Without -C the correct configuration will
not be reported since changes will often not be picked up.
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Signed-off-by: Simon Glass <sjg@chromium.org>
This reverts commit 19b4a33698.
Since that commit, patman generates useless patches for file removal;
"git format -D" prints only the header but not the diff when deleting
files, and "git am" always refuses such patches.
The following is the quotation from "man git-format-patch":
-D, --irreversible-delete
Omit the preimage for deletes, i.e. print only the header but
not the diff between the preimage and /dev/null. The resulting
patch is not meant to be applied with patch nor git apply; this
is solely for people who want to just concentrate on reviewing
the text after the change. In addition, the output obviously
lack enough information to apply such a patch in reverse, even
manually, hence the name of the option.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Acked-by: Simon Glass <sjg@chromium.org>
Now that we have converted the pch_gbe driver to driver moel,
enable it on Intel Crown Bay board.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
This commit converts pch_gbe ethernet driver to driver model.
Since this driver is only used by Intel Crown Bay board, the
conversion does not keep the non-dm version.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
Since E1000 driver has been converted to driver model, enable it
on Intel Crown Bay. But the Intel Topcliff GbE driver has not been
converted to driver model yet, disable it for now.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Move to driver model for USB on Intel Crown Bay.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
Acked-by: Simon Glass <sjg@chromium.org>
When given a device name string, we should test to see if it is
really an alias like "eth#".
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Add one more ethernet device node in the sandbox test device tree,
with name 'sbe5'. This is to support a new test case for testing
network device rotation.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
With driver model, board_eth_init() or cpu_eth_init() is not a must.
Thus we don't need print a misleading "Net Initialization Skipped".
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Commit 620776d "tftp: adjust settings to be suitable for 100Mbit ethernet"
causes the following error message when trying to load a file using 'tftp'
command via a tftp server.
TFTP error: 'Unsupported option(s) requested' (8)
This is due to with commit 620776d changes, the tftp option 'timeout'
value is now set to zero which is an invalid value as per RFC2349 [1].
Valid values range between "1" and "255" seconds, inclusive. With some
tftp servers that strictly implement the RFC requirement, it reports
such an error message.
Revert commit 620776d for RFC compliance.
[1] https://www.ietf.org/rfc/rfc2349.txt
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Add a PCI node to the device tree. This allows SPI flash and SATA to work
correctly. Also configure the video to come up correctly even though there
is no keyboard.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
With multiple microcode blobs included, the generated u-boot-dtb.bin
leaves merely several hundred bytes before the vga bios. Change the
vga bios rom address to make a bigger room for u-boot-dtb.bin.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
CONFIG_X86_OPTION_ROM_ADDR has been renamed to CONFIG_VGA_BIOS_ADDR.
Update the doc to refer to the new name.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
We have the capability to check regions written after U-Boot that
do not overlap. Since regions can also be written before U-Boot,
add such check for these too.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Andy Pont <andy.pont@sdcsystems.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
When an EHCI device is registered in device mode, the HW isn't actually
initialized at all, and hence isn't left in a running state. Consequently,
when the device is deregistered, ehci_shutdown() will fail, since the HW
bits it expects to see set in response to its shutdown requests will not
be sent, and the message "EHCI failed to shut down host controller." will
be printed.
Fix ehci-hcd.c to remember whether the device was registered in host or
device mode, and only call ehci_shutdown() for host mode registrations.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
This commit enables support for DFU_TFTP on the am335x bone black device.
Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The dfu tftp feature can be now enabled via Kconfig. This
commit provides necessary code for it.
Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
The "dfu" command has been extended to support transfers via TFTP protocol.
Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This code allows using DFU defined mediums for storing data received via
TFTP protocol.
It reuses and preserves functionality of legacy code at common/update.c.
The update_tftp() function now accepts parameters - namely medium device
name and its number (e.g. mmc 1).
Without this information passed old behavior is preserved.
Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This function allows writing via DFU data stored from fixed buffer address
(like e.g. loadaddr env variable).
Such predefined buffers are used in the update_tftp() code. In fact this
function is a wrapper on the dfu_write() and dfu_flush().
Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
This commit adds initial support for using tftp for downloading and
upgrading firmware on the device.
Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Up till now it was impossible to use code from update.c when system
was not equipped with raw FLASH memory.
Such behavior prevented DFU from reusing this code.
Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
This change gives the ability to reuse the <tftp.h> header file by other
subsystems (like e.g. dfu).
Without this change compilation error emerges for the legacy update.c file.
Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Documentation file for DFU extension. With this functionality it is now
possible to transfer FIT images with firmware updates via TFTP and use
DFU backend for storing them.
Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
Reviewed-by: Simon Glass <sjg@chromium.org>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>
Commit <8bfc288c3955> ("usb: gadget: ether: Perform board
initialization from ethernet gadget driver") added board_usb_init
and board_usb_cleanup in ethernet gadget driver. But h2200 board
didn't have board_usb_init and board_usb_cleanup implementations.
This introduced the following build errors
+drivers/usb/gadget/built-in.o: In function `usb_eth_halt':
+drivers/usb/gadget/ether.c:2498: undefined reference to `board_usb_cleanup'
+drivers/usb/gadget/built-in.o: In function `usb_eth_init':
+drivers/usb/gadget/ether.c:2316: undefined reference to `board_usb_init'
Fix it here by adding empty board_usb_init and board_usb_cleanup
functions in h2200.c.
Fixes: <8bfc288c3955> ("usb: gadget: ether: Perform board
initialization from ethernet gadget driver")
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
After extension of the dfu_get_buf() to also setup (implicitly) the dfu_buf_size
variable it is not needed to set dfu_buf_size to CONFIG_SYS_DFU_DATA_BUF_SIZE.
This variable is set in the dfu_get_buf() by not only considering
CONFIG_SYS_DFU_DATA_BUF but more importantly the "dfu_bufsiz" env variable.
Therefore, dfu_get_buf() should be used for initialization.
Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
Reviewed-by: Przemyslaw Marczak <p.marczak@samsung.com>
dfu-util allows filtering on USB device vendor:product ID by using
the -d flag (-d 0451:d022).
Such option is very handy when many DFU devices are connected to a single
host PC. This commit allows testing when above situation emerges.
Signed-off-by: Lukasz Majewski <l.majewski@majess.pl>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Lukasz Majewski <l.majewski@majess.pl>
Test HW - AM335x Beagle Bone Black
NOTE: Max size of file to transfer: 2MiB
Allocate request up to THOR_PACKET_SIZE not the ep0->maxpacket
as the descriptors data depend on the number of descriptors
and this 64 bytes were not enough and the buffer might overflow
which results in memalign failures later.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Dont perform reset at the end of thor download
if configured to do reset off.
Reset may not be required in all cases and hence
provided an option to do so.
The case would be to download the images to DDR instead
of flash device.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Zap variable which is set but never used.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Tested-by: Thomas Chou <thomas@wytron.com.tw>
Add support for the Terasic DE0-Nano/Atlas-SoC Kit, which is a CycloneV
based board. The board can boot from SD/MMC. Ethernet is also supported.
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
Add support for DENX MCV SoM, which is CycloneV based and the
associated DENX MCVEVK baseboard. The board can boot from eMMC.
Ethernet and USB is supported.
Signed-off-by: Marek Vasut <marex@denx.de>
Add support for Terasic SoCkit, which is CycloneV based board.
The board can boot either from SD/MMC or QSPI. Ethernet is also
supported.
Signed-off-by: Marek Vasut <marex@denx.de>
Instead of calling board_init_r() directly from board_init_f(), just
return from board_init_f(). This will make the code continue executing
in crt0.S _main(), from which the board_init_r() is called. This patch
aligns the SoCFPGA SPL with the correct SPL design as well as reduces
the stack utilisation slightly.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
The CONFIG_OF_CONTROL and CONFIG_SPL_OF_CONTROL is always enabled
on Altera SoCFPGA, remove the unnecessary checks.
Signed-off-by: Marek Vasut <marex@denx.de>
The SoCFPGA probes mostly from OF and the OF is mandatory both in
U-Boot itself and U-Boot SPL. Enable it by default.
Signed-off-by: Marek Vasut <marex@denx.de>
This fix makes sure that the ISWGRP0 and ISWGRP1 registers are
correctly inited. In case those registers are not initialized,
it is not possible to access the registers synthesised in the
FPGA through the bridges. Any such access produces data abort.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Bin Meng
Simon Glass
Masahiro Yamada
Tom Rini
Stephen Warren
Lukasz Majewski
Kishon Vijay Abraham I
Siva Durga Prasad Paladugu
Jiandong Zheng
Alexey Brodkin
Marek Vasut
Dinh Nguyen