If the net driver has setup a valid ethernet address and an ethernet
address is not set in the environment already, then set the environment
variables from the net driver setting.
This enables pxe booting on boards which don't set ethaddr env variable.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
This commit is an add-on to f6c4191f. There are a few registers where
consecutive writes to the same location should be avoided or have a delay.
According to Synopsys, here is a list of the registers and bit(s) where
consecutive writes should be avoided or a delay is required:
DMA Registers:
Register 0 Bit 7
Register 6 All bits except for 24, 16-13, 2-1.
GMAC Registers:
Registers 0-3 All bits
Registers 6-7 All bits
Register 10 All bits
Register 11 All bits except for 5-6.
Registers 16-47 All bits
Register 48 All bits except for 18-16, 14.
Register 448 Bit 4.
Register 459 Bits 0-3.
Signed-off-by: Dinh Nguyen <dinguyen@altera.com>
Reviewed-by: Matthew Gerlach <mgerlach@altera.com>
Acked-by: Amit Virdi <amit.virdi@st.com>
The asix driver did not align buffers, therefore it didn't work
with data cache enabled. Fix this.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@gmail.com>
Micrel accidentally used the same part number
for the KS8721 and KSZ9021. So, both cannot be
in the same build of u-boot. Add a config option
to handle this.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Vladimir Zapolskiy <vz@mleia.com>
Now that phy_startup() can return an actual error code, check for that error
code and abort network initialization if the PHY fails.
Signed-off-by: Timur Tabi <timur@freescale.com>
Acked-by: Nobuhiro Iwamamatsu <nobuhiro.iwamatsu.yj@renesas.com> (sh_eth part)
Acked-by: Stephan Linz <linz@li-pro.net> (Xilinx part, xilinx_axi_emac and xilinx_ll_temac)
Reviewed-by: Marek Vasut <marex@denx.de> (FEC part)
phy_startup() calls the PHY driver's startup function, but it ignores the
return code from that function, and so it never returns any failures.
Signed-off-by: Timur Tabi <timur@freescale.com>
The block argument for store_block can be -1 when the tftp sequence
number rolls over (i.e TftpBlock == 0), so the first argument to
store_block has to be of type 'int' instead of 'unsigned'.
In our environment (gcc 4.4.5 mips toolchain), this causes incorrect
'offset' to be generated for storing the block, and the tftp block
with number 0 will be written elsewhere, resulting in a bad block in
the downloaded file and a memory corruption.
Signed-off-by: Jayachandran Chandrasekharan Nair <jayachandranc@netlogicmicro.com>
Add I2C support.
Tested by placing a 24LC16 EEPROM into the U50 slot which comes empty from factory.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Large EEPROMs, e.g. 24lc32, need 2 byte to address the internal memory.
These devices require that the high byte of the internal address has to be
written first.
The mxs_i2c driver currently writes the address' low byte first.
The following patch fixes the byte order of the internal address that should
be written to the I2C device.
Signed-off-by: Torsten Fleischer <to-fleischer@t-online.de>
CC: Marek Vasut <marex@denx.de>
CC: Stefano Babic <sbabic@denx.de>
CC: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
Other then being very weird, this code was also wrong.
For example, say I set speed to 100K. I'll read back the speed
as 85937. But the speed is really 85937.5, so we I reset
the speed to 85937, I'll get 73660.7. After a couple of transactions
my speed is now exactly 68750 so it will remain there.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Marek Vasut <marex@denx.de>
Acked-by: Stefano Babic <sbabic@denx.de>
The following platforms had their config files changed
flea3, imx31_phycore, mx35pdk, mx53ard, mx53evk, mx53smd
and mx53loco.
Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
Acked-by: Stefano Babic <sbabic@denx.de>
The clean up patch missed an &, so we end up passing an int rather than
a pointer to the sprintf function.
arp.c: In function 'ArpReceive':
arp.c:197: warning: format '%p' expects type 'void *', but argument 3 has type 'int'
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
When support sh7734 of sh-ether, ECSIPR_BRCRXIP and other were removed.
Therefore SH7757 and SH7724 can not build. This revise this probelem.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Clear and prepare for device-tree driven configuration.
Remove CONFIG_SYS_INTC_0 definition
Use dynamic allocation instead of static.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Acked-by: Simon Glass <sjg@chromium.org>
Move __udelay to the timer code because of unification.
And clean coding style because of checkpatch.pl.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Acked-by: Simon Glass <sjg@chromium.org>
Add ldb_clk for use in parenting the pixel clock.
Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
The registers accessed inside clk_ipu_enable/disable are not present on MX6,
so make sure they only run on MX51 and MX53.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
The following erratum :
"ENGcm08316
IPU: Clarification regarding the bypass mode registers setup for
display and camera interfaces"
only applies to mx51, so restrict its usage for this SoC only.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
- enable OF control and embedded OF
- set default device tree file name to 'microblaze'
- add CPP to dtc proxy: board/xilinx/dts/microblaze.dts
- add an empty but processable dts for microblaze-generic
Signed-off-by: Stephan Linz <linz@li-pro.net>
Some architectures, for example Microblaze, doesn't need a
splitted device tree because every Microblaze hw design is
different. The individuell Microblaze device tree will be
auto generated by FPGA design tools and could be used directly
with dtc.
The auto generated dts for Microblaze can not processed by CPP.
Unfortunately that is the default procedure in U-Boot to merge
a splitted device tree (substitution of ARCH_CPU_DTS).
Microblaze will never use the ARCH_CPU_DTS substitution and we
introduce the new board specific substitution variable BOARD_DTS
that points into vendor/board/dts subdir with the file name
of CONFIG_DEFAULT_DEVICE_TREE. The common dts file in vendor/dts
subdir (defined by CONFIG_DEFAULT_DEVICE_TREE) contain a single
include line that can processed by CPP:
/include/ BOARD_DTS
Signed-off-by: Stephan Linz <linz@li-pro.net>
Tested-by: Michal Simek <monstr@monstr.eu>
Acked-by: Simon Glass <sjg@chromium.org>
* 'master' of git://git.denx.de/u-boot-arm:
tegra: define fdt_load/fdt_high variables
tegra: enable bootz command
tegra: usb: Fix device enumeration problem of USB1
tegra: trimslice: set up serial flash pinmux
tegra: add pin_mux_spi() board initialization function
tegra: add GMC/GMD funcmux entry for SFLASH
tegra: bootcmd: start USB only when needed
tegra: bootcmd enhancements
tegra: add enterrcm command
tegra: enable CONFIG_ENV_VARS_UBOOT_CONFIG
Add env vars describing U-Boot target board
tegra: usb: fix wrong error check
tegra: add ULPI on USB2 funcmux entry
tegra: fix leftover CONFIG_TEGRA2_MMC & _SPI build switches
tegra: Add Tamonten Evaluation Carrier support
tegra: Use SD write-protect GPIO on Tamonten
tegra: Implement gpio_early_init() on Tamonten
tegra: Allow boards to perform early GPIO setup
tegra: plutux: Add device tree support
tegra: medcom: Add device tree support
tegra: Rework Tamonten support
beagle: add eeprom expansion board info for bct brettl4
Signed-off-by: Wolfgang Denk <wd@denx.de>
* 'master' of git://git.denx.de/u-boot-usb:
CONFIG: EXYNOS5: USB: Enable USB 2.0 on smdk5250
EXYNOS5: USB: Fix incorrect USB base addresses
EXYNOS: Add power Enable/Disable for USB-EHCI
USB: EXYNOS: Set USB 2.0 HOST Link mode
EXYNOS5: Add structure for PMU registers
EXYNOS5: Fix system register structure
USB: EXYNOS: Incorporate EHCI review comments
Signed-off-by: Wolfgang Denk <wd@denx.de>
These variables act like loadaddr, but for a device tree image. Defining
them in the environment allows boot scripts to be identical on Tegra20 and
Tegra30, which have different memory base addresses, and hence need
different values for these variables.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
bootz is just like bootm, except that it can boot a raw zImage, without
requiring it to be wrapped inside a uImage.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
A known hardware issue of USB1 port where bit 1 (connect status
change) of PORTSC register will be set after issuing Port Reset
(like "usb reset" in u-boot command line).
This will be treated as an error and stops later device enumeration.
Therefore we clear that bit after Port Reset in order to proceed
later device enumeration.
Signed-off-by: Jim Lin <jilin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
When Trimslice is booted from serial flash, the boot ROM does this, so
U-Boot doesn't need to. However, booting from the SD slot for recovery
purposes, the boot ROM does not set up the pinmux for serial flash. Add
code to U-Boot to set this up, so that an SD-based recovery U-Boot image
can upgrade the U-Boot in serial flash.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Boards can override this to set up the pinmux correctly to access serial
flash.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Instead of initializing USB as soon as bootcmd is executed, defer it
until the first boot device that (potentially in the case of network)
uses USB is scanned. This avoids initializing USB when booting from MMC,
so speeds that up.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Place the list of searched boot devices, file-system types, boot file
locations/prefixes, and boot script names into variables. This allows
the user to override them directly (e.g. to change boot order, or select
the specific values they use) without having to edit the main bootcmd
and script_boot variables.
The default boot order is changed from USB, MMC, DHCP to MMC, USB, DHCP.
This speeds up the typical MMC boot case. People who want USB boot can
now edit variable boot_targets appropriately.
Also, reformat BOOTCMDS_COMMON to fit within 80 columns.
Potential future enhancements might be:
* Allow boards to specify which of bootcmd_mmc0/... should be defined,
based on the HW they contain.
* Allow boards to influence the order that the boot targets are added
into the boot_targets variable.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Tegra's boot ROM supports a mode whereby code may be downloaded and flash
programmed over a USB connection. On dev boards, this is typically entered
by holding down a "force recovery" button and resetting the CPU. However,
not all boards have such a button (one example is the Compulab Trimslice),
so a method to enter RCM from software is useful.
This change implements the command "enterrcm" to do this, and enables it
for all Tegra boards by default. Even on boards other than Trimslice,
controlling this over a UART may be useful, e.g. to allow simple remote
control without the need for mechanical button actuators, or hooking up
relays/... to the button.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
So that all Tegra boards define environment variables that describe
themselves.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This can be useful for generic scripts. For example, rather than hard-
coding a script to ext2load tegra-harmony.dtb, it could load
${soc}-${board}.dtb and hence not need adjustments to run on multiple
boards.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
loop_count runs down from 10000, so the correct condition to error out
is ==0.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
CC: Stephen Warren <swarren@wwwdotorg.org>
CC: Tom Warren <twarren.nvidia@gmail.com>
Tested-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
This is needed as a prerequisite for Tegra USB ULPI support
within U-Boot.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
CC: Stephen Warren <swarren@wwwdotorg.org>
CC: Tom Warren <twarren@nvidia.com>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Missed some boards after my tegra2_mmc.* -> tegra_mmc.* change, and
one instance of CONFIG_TEGRA2_SPI. MAKEALL -s tegra2 AOK, Seaboard MMC
AOK. Didn't test Tamonten, Paz00 or TrimSlice, as I have none here.
Signed-off-by: Tom Warren <twarren@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
GPIO PI6 can be used to obtain the write-protect status of an SD card
inserted into the SD slot.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
The PI4 GPIO is used on Tamonten to reset carrier board peripherals.
Power sequencing hardware on the carrier pulls the reset low before
powering up the Tegra, and the CPU is supposed to signal readiness,
and therefore bring peripherals out of reset by pulling PI4 high.
Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Rob Herring
Dinh Nguyen
Marek Vasut
Troy Kisky
Timur Tabi
Jayachandran Chandrasekharan Nair
Fabio Estevam
Torsten Fleischer
Mike Frysinger
Nobuhiro Iwamatsu
Michal Simek
Eric Nelson
Nikita Kiryanov
Stephan Linz
Wolfgang Denk
Rajeshwari Shinde
Stephen Warren
Jim Lin
Lucas Stach
Tom Warren
Thierry Reding