A value of BSC CS4 was wrong, Fixed it.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu.nobuhiro@renesas.com>
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Commit 6b59e03e02
lcd: Let the board code show board-specific info
introduced some bugs which prevent U-Boot building
for lwmon board if CONFIG_LCD_INFO_BELOW_LOGO will
be defined in the board configuration.
Also "LCD enabled" building for TQM823L doesn't work
since this commit.
This patch fixes above-mentioned issues.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Add define used to determine if PCI1 interface is in PCI or PCIX mode.
Convert users of the old PORDEVSR_PCI constant to use MPC85xx_PORDEVSR_PCI1
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Signed-off-by: Andy Fleming <afleming@freescale.com>
since commit be0bd8234b
tlb entry for socrates DDR SDRAM will be reconfigured
by setup_ddr_tlbs() from initdram() causing an
inconsistency with previously configured DDR SDRAM tlb
entry from tlb_table:
socrates>l2cam 7 9
IDX PID EPN SIZE V TS RPN U0-U3 WIMGE UUUSSS
7 : 00 00000000 256MB V 0 -> 0_00000000 0000 -I-G- ---RWX
8 : 00 00000000 256MB V 0 -> 0_00000000 0000 ----- ---RWX
9 : 00 10000000 256MB V 0 -> 0_10000000 0000 ----- ---RWX
This patch makes the presence of the DDR SDRAM tlb entry in
the tlb_table dependent on CONFIG_SPD_EEPROM to avoid this
inconsistency.
Signed-off-by: Anatolij Gustschin <agust@denx.de>
Acked-by: Andy Fleming <afleming@freescale.com>
All mpc8548-based boards should implement the suggested workaround
to CPU 2 errata. Without the workaround, its possible for the
8548's core to hang while executing a msync or mbar 0 instruction
and a snoopable transaction from an I/O master tagged to make
quick forward progress is present.
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
Acked-by: Andy Fleming <afleming@freescale.com>
The DDR controller of 8548/8544/8568/8572/8536 processors
have the ECC data init feature, and the new DDR code is
using the feature, and we don't need the way with DMA to
init memory any more.
Signed-off-by: Dave Liu <daveliu@freescale.com>
Acked-by: Andy Fleming <afleming@freescale.com>
This BSP should be outside u-boot source tree.
The second reason is that xilinx ppc405 was moved to generic platform.
Signed-off-by: Michal Simek <monstr@monstr.eu>
Signed-off-by: Stefan Roese <sr@denx.de>
Expanded OCM TLB to allow access to 64K OCM as well as 256K of
internal SRAM.
Adjusted internal SRAM initialization to match updated user
manual recommendation.
OCM & ISRAM are now mapped as follows:
physical virtual size
ISRAM 0x4_0000_0000 0xE300_0000 256k
OCM 0x4_0004_0000 0xE304_0000 64k
A single TLB was used for this mapping.
Signed-off-by: Dave Mitchell <dmitch71@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Added include/asm-ppc/ppc4xx-isram.h and moved internal SRAM and
L2 cache DCRs from ppc440.h to this new header.
Also converted these DCR defines from lowercase to uppercase and
modified referencing modules to use them.
Signed-off-by: Dave Mitchell <dmitch71@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Introduce AT91_CPU_CLOCK and use it for displaying the CPU
speed in the LCD driver.
Also make AT91_MAIN_CLOCK and AT91_MASTER_CLOCK reflect the
corresponding board clocks.
Signed-off-by: Stelian Pop <stelian@popies.net>
To enable UBI on Apollon you need to uncomment the CONFIG_SYS_USE_UBI
macro.
Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
Signed-off-by: Stefan Roese <sr@denx.de>
Most of the bss initialization loop increments 4 bytes
at a time. And the loop end is checked for an 'equal'
condition. Make the bss end address aligned by 4, so
that the loop will end as expected.
Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com>
Signed-off-by: Wolfgang Denk <wd@denx.de>
address-cells defaults to 2, not 1; so in the unlikely
event that it isn't specified, this patch is required
for correct operation.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Since we've changed the memory map of the board, be nice and
add some checking to try to catch out-of-date .dts files. We do
this by checking the CCSRBAR location in the .dts and comparing
it to the CCSRBAR location in u-boot. If they don't match, a
warning msg is printed. This isn't foolproof, but it's simple and
will catch most of the cases where an out-of-date .dts is present,
including all of the cases where a new u-boot is used with an old
standard MPC8641 .dts file as supplied with Linux.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
This patch creates a memory map with all the devices
in 36-bit physical space, in addition to the 32-bit map.
The CCSR relocation is moved (again, sorry) to
allow for the physical address to be 36 bits - this
requires translation to be enabled. With 36-bit physical
addressing enabled, we are no longer running with VA=PA
translations. This means we have to distinguish between
the two in the config file. The existing region name is
used to indicate the virtual address, and a _PHYS variety
is created to represent the physical address.
Large physical addressing is not enabled by default.
Set CONFIG_PHYS_64BIT in the config file to turn this on.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
The memory map on the 8641hpcn is modified to look more like
the 85xx boards; this is a step towards a more standardized
layout going forward. As part of this change, we now relocate
the flash.
The regions for some of the mappings were far larger than they
needed to be. I have reduced the mappings to match the
actual sizes supported by the hardware.
In addition I have removed the comments at the head
of the BAT blocks in the config file, rather than updating
them. These get horribly out of date, and it's a simple
matter to look at the defines to see what they are set to
since everything is right here in the same file.
Documentation has been changed to reflect the new map, as this
change is user visible, and affects the OS which runs post-uboot.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
There's a lot of setup and foo for the second flash
bank. The problem is, this board doesn't actually have one.
Clean this up. Also, the flash is 8M in size. Get rid
of the confusing aliased overmapping, and just map 8M.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Also changed path in all linker scripts that reference this driver
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
Acked-by: Stefan Roese <sr@denx.de>
AT91_BASE_EMAC is never used outside the board specific files,
so replace its usage by the board specific AT91xxx_BASE_EMAC.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
AT91_ID_US0 / AT91_ID_US1 / AT91_ID_US2 were used but never defined.
Since they are never used outside the board specific files, they can
be replaced by the board specific AT91xxx_ID_US0 / AT91xxx_ID_US1 /
AT91xxx_ID_US2.
Bug spotted by Jesus Alvarez <jalvarez@micromint.com>.
Signed-off-by: Stelian Pop <stelian@popies.net>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
This patch provides support for AFEB9260 board, a product of
OpenSource hardware and software. Some commertial projects
are made with this design. A board is basically AT91SAM9260-EK
with some modifications and different peripherals and different
parts used. Main purpose of this project is to gain experience in
hardware design.
More info: http://groups.google.com/group/arm9fpga-evolution-board
(In Russian only, sorry).
Subversion repository: svn://194.85.238.22/home/users/george/svn/arm9eb
Signed-off-by: Sergey Lapin <slapin@ossfans.org>
You can't actually have both, and with some coming changes to
change the memory map for the board and support 36-bit physical,
we need the extra BAT that is being consumed by having both.
I also make non-PCI configs build cleanly, for the sake of sanity.
Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
Fix compilation issue caused by a few mismatches.
Provide proper nand chip select enable/disable in
nand_hwcontrol() rather than in board_nand_init()
just enable once. Remove redundant local nand driver
functions - nand_read_byte(), nand_write_byte() and
nand_dev_ready() to use common nand driver.
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Will use mcfmii.c driver in drivers/net rather than
keep creating new mii.c for each future platform.
Remove EB+MCF-EV123, cobra5272, idmr, M5235EVB,
M5271EVB, M5272C3, M5275EVB, M5282EVB, M5329EVB,
M5373EVB, M54451EVB, M54455EVB, M547xEVB, and M548xEVB's
mii.c
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
Each different build for M54455EVB and M5235EVB will
create a u-boot.lds linker file. It is redundant to
keep the u-boot.lds
Signed-off-by: TsiChung Liew <Tsi-Chung.Liew@freescale.com>
This patch defines 1M TLB&LAW size for NAND on MPC8536DS, assigns 0xffa00000
for CONFIG_SYS_NAND_BASE and adds other NAND supports in config file.
It also moves environment(CONFIG_ENV_ADDR) outside of u-boot image.
Singed-off-by: Jason Jin <Jason.Jin@freescale.com>
Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
Nobuhiro Iwamatsu
Wolfgang Denk
Gary Jennejohn
Peter Tyser
Anatolij Gustschin
Dave Liu
Michal Simek
Matthias Fuchs
Stefan Roese
Dave Mitchell
Stelian Pop
Kyungmin Park
Selvamuthukumar
Becky Bruce
Ben Warren
Sergey Lapin
Roman Mashak
TsiChung Liew
Andy Fleming
Jason Jin
Nobuhiro Iwamatsu