The rfcks should be shifted by 28 bits left. We didn't notice the bug
because we were using only 100MHz clocks (for which rfcks == 0).
Though, for SGMII we'll need 125MHz clocks.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Anton Vorontsov
Kumar Gala
Jean-Christophe PLAGNIOL-VILLARD