3 Commits (cfdaf4caa250a4bc3de41f47147715e8a81be5a2)

Author	SHA1	Message	Date
Alexander Stein	4cffbec96a	arm/rpi: Enable dcache ... Now that mailbox driver supports cache flush and invalidation, we can enable dcache. Signed-off-by: Alexander Stein <alexanders83@web.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Stephen Warren <swarren@wwwdotorg.org>	10 years ago
Alexander Stein	060f9bf57b	ARM: bcm283x: Define CONFIG_SYS_CACHELINE_SIZE ... The cacheline is always 32 bytes for arm1176 CPUs, so define it at board config level for cache handling code. The ARM Cortex-A7 has a dcache line size of 64 bytes. Signed-off-by: Alexander Stein <alexanders83@web.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Stephen Warren <swarren@wwwdotorg.org>	10 years ago
Stephen Warren	4641429695	rpi: add support for Raspberry Pi 2 model B ... USB doesn't seem to work yet; the controller detects the on-board Hub/ Ethernet device but can't read the descriptors from it. I haven't investigated yet. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>	10 years ago