u-boot

Commit Graph

Author	SHA1	Message	Date
Daniel Schwierzeck	bd60252811	MIPS: reserve space for exception vectors In order to set own exception handlers, a table with the exception vectors must be built in DRAM and the CPU EBase register must be set to the base address of this table. Reserve the space above the stack and use gd->irq_sp as storage for the exception base address. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>	9 years ago

Author

SHA1

Message

Date

Daniel Schwierzeck

bd60252811

MIPS: reserve space for exception vectors

In order to set own exception handlers, a table with the exception
vectors must be built in DRAM and the CPU EBase register must be
set to the base address of this table.

Reserve the space above the stack and use gd->irq_sp as storage
for the exception base address.

Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>

9 years ago

1 Commits (d315628edbc99572c3d35cb72fffcd32e12f859b)