u-boot

Commit Graph

Author	SHA1	Message	Date
Bin Meng	de9ac9a1b9	x86: Add Intel Braswell SoC support This adds initial Intel Braswell SoC support. It uses Intel FSP to initialize the chipset. Similar to its predecessor BayTrail, there are some work to do to enable the legacy UART integrated in the Braswell SoC. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>	7 years ago

Author

SHA1

Message

Date

Bin Meng

de9ac9a1b9

x86: Add Intel Braswell SoC support

This adds initial Intel Braswell SoC support. It uses Intel FSP
to initialize the chipset.

Similar to its predecessor BayTrail, there are some work to do to
enable the legacy UART integrated in the Braswell SoC.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

7 years ago

1 Commits (e8e39597a33cc53aacbaf4ef5cae60ed86d6a20a)