These flags were necessary when building tegra20 as a single binary
that supported ARM7TDMI and Cortex A9. Now that the ARM7TDMI support
is split into a separate SPL, this is no longer necessary.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Add SPL options to tegra20 config files and enable SPL build for
tegra20 boards. Also remove redundant code from u-boot that is not
contained in SPL.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Move warmboot_save_sdram_params() to later in the boot sequence. This
code relies on devicetree to get the address of the memory controller
and with upcoming changes for SPL boot it gets called early in the
boot process when devicetree is not initialized yet.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
In preparation for splitting out the armv4t code from tegra20, move
the tegra20 SoC code to arch/arm/cpu/tegra20-common. This code will
be compiled armv4t for the arm7tdmi and armv7 for the cortex A9.
Signed-off-by: Allen Martin <amartin@nvidia.com>
Acked-by: Stephen Warren <swarren@wwwdotorg.org>
Tested-by: Thierry Reding <thierry.reding@avionic-design.de>
Signed-off-by: Tom Warren <twarren@nvidia.com>
Allen Martin