upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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112 lines
2.2 KiB
112 lines
2.2 KiB
// SPDX-License-Identifier: GPL-2.0+
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/*
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*
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* (C) Copyright 2000-2003
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* Copyright (C) 2004-2007, 2012 Freescale Semiconductor, Inc.
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* TsiChung Liew (Tsi-Chung.Liew@freescale.com)
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*/
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#include <common.h>
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#include <watchdog.h>
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#include <command.h>
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#include <netdev.h>
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#include <asm/immap.h>
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#include <asm/io.h>
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DECLARE_GLOBAL_DATA_PTR;
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int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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ccm_t *ccm = (ccm_t *) MMAP_CCM;
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out_8(&ccm->rcr, CCM_RCR_SOFTRST);
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/* we don't return! */
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return 0;
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}
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#if defined(CONFIG_DISPLAY_CPUINFO)
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int print_cpuinfo(void)
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{
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ccm_t *ccm = (ccm_t *) MMAP_CCM;
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u16 msk;
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u16 id = 0;
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u8 ver;
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puts("CPU: ");
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msk = (in_be16(&ccm->cir) >> 6);
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ver = (in_be16(&ccm->cir) & 0x003f);
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switch (msk) {
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case 0x31:
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id = 5235;
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break;
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}
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if (id) {
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char buf1[32], buf2[32];
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printf("Freescale MCF%d (Mask:%01x Version:%x)\n", id, msk,
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ver);
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printf(" CPU CLK %s MHz BUS CLK %s MHz\n",
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strmhz(buf1, gd->cpu_clk),
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strmhz(buf2, gd->bus_clk));
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}
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return 0;
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};
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#endif /* CONFIG_DISPLAY_CPUINFO */
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#if defined(CONFIG_WATCHDOG)
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/* Called by macro WATCHDOG_RESET */
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void watchdog_reset(void)
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{
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wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
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/* Count register */
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out_be16(&wdp->sr, 0x5555);
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asm("nop");
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out_be16(&wdp->sr, 0xaaaa);
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}
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int watchdog_disable(void)
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{
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wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
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/* UserManual, once the wdog is disabled, wdog cannot be re-enabled */
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/* halted watchdog timer */
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setbits_be16(&wdp->cr, WTM_WCR_HALTED);
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puts("WATCHDOG:disabled\n");
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return (0);
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}
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int watchdog_init(void)
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{
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wdog_t *wdp = (wdog_t *) (MMAP_WDOG);
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u32 wdog_module = 0;
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/* set timeout and enable watchdog */
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wdog_module = ((CONFIG_SYS_CLK / CONFIG_SYS_HZ) * CONFIG_WATCHDOG_TIMEOUT);
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wdog_module |= (wdog_module / 8192);
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out_be16(&wdp->mr, wdog_module);
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out_be16(&wdp->cr, WTM_WCR_EN);
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puts("WATCHDOG:enabled\n");
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return (0);
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}
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#endif /* CONFIG_WATCHDOG */
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#if defined(CONFIG_MCFFEC)
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/* Default initializations for MCFFEC controllers. To override,
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* create a board-specific function called:
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* int board_eth_init(bd_t *bis)
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*/
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int cpu_eth_init(bd_t *bis)
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{
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return mcffec_initialize(bis);
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}
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#endif
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