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// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2018 Ãlvaro Fernández Rojas <noltari@gmail.com>
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*/
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#include <dt-bindings/clock/bcm6362-clock.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/power-domain/bcm6362-power-domain.h>
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#include <dt-bindings/reset/bcm6362-reset.h>
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#include "skeleton.dtsi"
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/ {
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compatible = "brcm,bcm6362";
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aliases {
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spi0 = &lsspi;
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spi1 = &hsspi;
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};
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cpus {
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reg = <0x10000000 0x4>;
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#address-cells = <1>;
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#size-cells = <0>;
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u-boot,dm-pre-reloc;
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cpu@0 {
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compatible = "brcm,bcm6362-cpu", "mips,mips4Kc";
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device_type = "cpu";
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reg = <0>;
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u-boot,dm-pre-reloc;
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};
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cpu@1 {
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compatible = "brcm,bcm6362-cpu", "mips,mips4Kc";
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device_type = "cpu";
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reg = <1>;
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u-boot,dm-pre-reloc;
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};
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};
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clocks {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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u-boot,dm-pre-reloc;
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hsspi_pll: hsspi-pll {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <133333333>;
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};
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periph_osc: periph-osc {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <50000000>;
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u-boot,dm-pre-reloc;
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};
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periph_clk: periph-clk {
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compatible = "brcm,bcm6345-clk";
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reg = <0x10000004 0x4>;
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#clock-cells = <1>;
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};
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};
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ubus {
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compatible = "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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u-boot,dm-pre-reloc;
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pll_cntl: syscon@10000008 {
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compatible = "syscon";
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reg = <0x10000008 0x4>;
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};
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syscon-reboot {
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compatible = "syscon-reboot";
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regmap = <&pll_cntl>;
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offset = <0x0>;
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mask = <0x1>;
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};
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periph_rst: reset-controller@10000010 {
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compatible = "brcm,bcm6345-reset";
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reg = <0x10000010 0x4>;
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#reset-cells = <1>;
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};
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wdt: watchdog@1000005c {
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compatible = "brcm,bcm6345-wdt";
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reg = <0x1000005c 0xc>;
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clocks = <&periph_osc>;
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};
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wdt-reboot {
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compatible = "wdt-reboot";
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wdt = <&wdt>;
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};
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gpio1: gpio-controller@10000080 {
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compatible = "brcm,bcm6345-gpio";
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reg = <0x10000080 0x4>, <0x10000088 0x4>;
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gpio-controller;
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#gpio-cells = <2>;
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ngpios = <16>;
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status = "disabled";
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};
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gpio0: gpio-controller@10000084 {
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compatible = "brcm,bcm6345-gpio";
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reg = <0x10000084 0x4>, <0x1000008c 0x4>;
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gpio-controller;
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#gpio-cells = <2>;
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status = "disabled";
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};
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uart0: serial@10000100 {
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compatible = "brcm,bcm6345-uart";
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reg = <0x10000100 0x18>;
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clocks = <&periph_osc>;
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status = "disabled";
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};
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uart1: serial@10000120 {
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compatible = "brcm,bcm6345-uart";
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reg = <0x10000120 0x18>;
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clocks = <&periph_osc>;
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status = "disabled";
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};
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lsspi: spi@10000800 {
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compatible = "brcm,bcm6358-spi";
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reg = <0x10000800 0x70c>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&periph_clk BCM6362_CLK_SPI>;
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resets = <&periph_rst BCM6362_RST_SPI>;
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spi-max-frequency = <20000000>;
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num-cs = <8>;
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status = "disabled";
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};
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hsspi: spi@10001000 {
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compatible = "brcm,bcm6328-hsspi";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x10001000 0x600>;
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clocks = <&periph_clk BCM6362_CLK_HSSPI>, <&hsspi_pll>;
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clock-names = "hsspi", "pll";
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resets = <&periph_rst BCM6362_RST_SPI>;
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spi-max-frequency = <50000000>;
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num-cs = <8>;
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status = "disabled";
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};
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leds: led-controller@10001900 {
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compatible = "brcm,bcm6328-leds";
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reg = <0x10001900 0x24>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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periph_pwr: power-controller@10001848 {
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compatible = "brcm,bcm6328-power-domain";
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reg = <0x10001848 0x4>;
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#power-domain-cells = <1>;
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};
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ehci: usb-controller@10002500 {
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compatible = "brcm,bcm6362-ehci", "generic-ehci";
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reg = <0x10002500 0x100>;
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phys = <&usbh>;
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big-endian;
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status = "disabled";
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};
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ohci: usb-controller@10002600 {
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compatible = "brcm,bcm6362-ohci", "generic-ohci";
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reg = <0x10002600 0x100>;
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phys = <&usbh>;
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big-endian;
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status = "disabled";
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};
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usbh: usb-phy@10002700 {
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compatible = "brcm,bcm6368-usbh";
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reg = <0x10002700 0x38>;
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#phy-cells = <0>;
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clocks = <&periph_clk BCM6362_CLK_USBH>;
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clock-names = "usbh";
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power-domains = <&periph_pwr BCM6362_PWR_USBH>;
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resets = <&periph_rst BCM6362_RST_USBH>;
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status = "disabled";
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};
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memory-controller@10003000 {
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compatible = "brcm,bcm6328-mc";
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reg = <0x10003000 0x864>;
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u-boot,dm-pre-reloc;
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};
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};
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};
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