upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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828 lines
19 KiB
828 lines
19 KiB
/*
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* (C) Copyright 2005
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* Stefan Strobl, GERSYS GmbH, stefan.strobl@gersys.de
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*
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* (C) Copyright 2005
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* Martin Krause, TQ-Systems GmbH, martin.krause@tqs.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <command.h>
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/*
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* BC3450 specific commands
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*/
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#if defined(CONFIG_CMD_BSP)
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#undef DEBUG
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#ifdef DEBUG
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# define dprintf(fmt,args...) printf(fmt, ##args)
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#else
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# define dprintf(fmt,args...)
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#endif
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/*
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* Definitions for DS1620 chip
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*/
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#define THERM_START_CONVERT 0xee
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#define THERM_RESET 0xaf
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#define THERM_READ_CONFIG 0xac
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#define THERM_READ_TEMP 0xaa
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#define THERM_READ_TL 0xa2
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#define THERM_READ_TH 0xa1
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#define THERM_WRITE_CONFIG 0x0c
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#define THERM_WRITE_TL 0x02
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#define THERM_WRITE_TH 0x01
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#define CONFIG_SYS_CPU 2
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#define CONFIG_SYS_1SHOT 1
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#define CONFIG_SYS_STANDALONE 0
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struct therm {
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int hi;
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int lo;
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};
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/*
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* SM501 Register
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*/
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#define SM501_GPIO_CTRL_LOW 0x00000008UL /* gpio pins 0..31 */
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#define SM501_GPIO_CTRL_HIGH 0x0000000CUL /* gpio pins 32..63 */
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#define SM501_POWER_MODE0_GATE 0x00000040UL
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#define SM501_POWER_MODE1_GATE 0x00000048UL
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#define POWER_MODE_GATE_GPIO_PWM_I2C 0x00000040UL
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#define SM501_GPIO_DATA_LOW 0x00010000UL
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#define SM501_GPIO_DATA_HIGH 0x00010004UL
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#define SM501_GPIO_DATA_DIR_LOW 0x00010008UL
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#define SM501_GPIO_DATA_DIR_HIGH 0x0001000CUL
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#define SM501_PANEL_DISPLAY_CONTROL 0x00080000UL
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#define SM501_CRT_DISPLAY_CONTROL 0x00080200UL
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/* SM501 CRT Display Control Bits */
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#define SM501_CDC_SEL (1 << 9)
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#define SM501_CDC_TE (1 << 8)
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#define SM501_CDC_E (1 << 2)
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/* SM501 Panel Display Control Bits */
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#define SM501_PDC_FPEN (1 << 27)
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#define SM501_PDC_BIAS (1 << 26)
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#define SM501_PDC_DATA (1 << 25)
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#define SM501_PDC_VDDEN (1 << 24)
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/* SM501 GPIO Data LOW Bits */
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#define SM501_GPIO24 0x01000000
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#define SM501_GPIO25 0x02000000
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#define SM501_GPIO26 0x04000000
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#define SM501_GPIO27 0x08000000
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#define SM501_GPIO28 0x10000000
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#define SM501_GPIO29 0x20000000
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#define SM501_GPIO30 0x40000000
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#define SM501_GPIO31 0x80000000
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/* SM501 GPIO Data HIGH Bits */
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#define SM501_GPIO46 0x00004000
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#define SM501_GPIO47 0x00008000
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#define SM501_GPIO48 0x00010000
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#define SM501_GPIO49 0x00020000
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#define SM501_GPIO50 0x00040000
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#define SM501_GPIO51 0x00080000
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/* BC3450 GPIOs @ SM501 Data LOW */
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#define DIP (SM501_GPIO24 | SM501_GPIO25 | SM501_GPIO26 | SM501_GPIO27)
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#define DS1620_DQ SM501_GPIO29 /* I/O */
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#define DS1620_CLK SM501_GPIO30 /* High active O/P */
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#define DS1620_RES SM501_GPIO31 /* Low active O/P */
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/* BC3450 GPIOs @ SM501 Data HIGH */
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#define BUZZER SM501_GPIO47 /* Low active O/P */
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#define DS1620_TLOW SM501_GPIO48 /* High active I/P */
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#define PWR_OFF SM501_GPIO49 /* Low active O/P */
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#define FP_DATA_TRI SM501_GPIO50 /* High active O/P */
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/*
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* Initialise GPIO on SM501
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*
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* This function may be called from several other functions.
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* Yet, the initialisation sequence is executed only the first
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* time the function is called.
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*/
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int sm501_gpio_init (void)
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{
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static int init_done = 0;
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if (init_done) {
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/* dprintf("sm501_gpio_init: nothing to be done.\n"); */
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return 1;
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}
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/* enable SM501 GPIO control (in both power modes) */
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*(vu_long *) (SM501_MMIO_BASE + SM501_POWER_MODE0_GATE) |=
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POWER_MODE_GATE_GPIO_PWM_I2C;
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*(vu_long *) (SM501_MMIO_BASE + SM501_POWER_MODE1_GATE) |=
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POWER_MODE_GATE_GPIO_PWM_I2C;
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/* set up default O/Ps */
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*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_LOW) &=
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~(DS1620_RES | DS1620_CLK);
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*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_LOW) |= DS1620_DQ;
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*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_HIGH) &=
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~(FP_DATA_TRI);
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*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_HIGH) |=
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(BUZZER | PWR_OFF);
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/* configure directions for SM501 GPIO pins */
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*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_CTRL_LOW) &= ~(0xFF << 24);
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*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_CTRL_HIGH) &=
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~(0x3F << 14);
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*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_DIR_LOW) &=
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~(DIP | DS1620_DQ);
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*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_DIR_LOW) |=
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(DS1620_RES | DS1620_CLK);
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*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_DIR_HIGH) &=
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~DS1620_TLOW;
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*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_DIR_HIGH) |=
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(PWR_OFF | BUZZER | FP_DATA_TRI);
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init_done = 1;
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/* dprintf("sm501_gpio_init: done.\n"); */
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return 0;
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}
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/*
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* dip - read Config Inputs
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*
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* read and prints the dip switch
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* and/or external config inputs (4bits) 0...0x0F
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*/
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int cmd_dip (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
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{
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vu_long rc = 0;
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sm501_gpio_init ();
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/* read dip switch */
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rc = *(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_LOW);
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rc = ~rc;
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rc &= DIP;
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rc = (int) (rc >> 24);
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/* plausibility check */
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if (rc > 0x0F)
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return -1;
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printf ("0x%lx\n", rc);
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return 0;
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}
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U_BOOT_CMD (dip, 1, 1, cmd_dip,
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"read dip switch and config inputs",
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"\n"
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" - prints the state of the dip switch and/or\n"
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" external configuration inputs as hex value.\n"
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" - \"Config 1\" is the LSB");
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/*
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* buz - turns Buzzer on/off
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*/
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#ifdef CONFIG_BC3450_BUZZER
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static int cmd_buz (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
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{
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if (argc != 2) {
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printf ("Usage:\nspecify one argument: \"on\" or \"off\"\n");
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return 1;
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}
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sm501_gpio_init ();
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if (strncmp (argv[1], "on", 2) == 0) {
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*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_HIGH) &=
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~(BUZZER);
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return 0;
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} else if (strncmp (argv[1], "off", 3) == 0) {
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*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_HIGH) |=
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BUZZER;
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return 0;
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}
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printf ("Usage:\nspecify one argument: \"on\" or \"off\"\n");
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return 1;
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}
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U_BOOT_CMD (buz, 2, 1, cmd_buz,
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"turns buzzer on/off",
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"\n" "buz <on/off>\n" " - turns the buzzer on or off");
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#endif /* CONFIG_BC3450_BUZZER */
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/*
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* fp - front panel commands
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*/
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static int cmd_fp (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
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{
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sm501_gpio_init ();
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if (strncmp (argv[1], "on", 2) == 0) {
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/* turn on VDD first */
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*(vu_long *) (SM501_MMIO_BASE +
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SM501_PANEL_DISPLAY_CONTROL) |= SM501_PDC_VDDEN;
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udelay (1000);
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/* then put data on */
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*(vu_long *) (SM501_MMIO_BASE +
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SM501_PANEL_DISPLAY_CONTROL) |= SM501_PDC_DATA;
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/* wait some time and enable backlight */
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udelay (1000);
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*(vu_long *) (SM501_MMIO_BASE +
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SM501_PANEL_DISPLAY_CONTROL) |= SM501_PDC_BIAS;
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udelay (1000);
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*(vu_long *) (SM501_MMIO_BASE +
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SM501_PANEL_DISPLAY_CONTROL) |= SM501_PDC_FPEN;
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return 0;
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} else if (strncmp (argv[1], "off", 3) == 0) {
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/* turn off the backlight first */
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*(vu_long *) (SM501_MMIO_BASE +
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SM501_PANEL_DISPLAY_CONTROL) &= ~SM501_PDC_FPEN;
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udelay (1000);
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*(vu_long *) (SM501_MMIO_BASE +
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SM501_PANEL_DISPLAY_CONTROL) &= ~SM501_PDC_BIAS;
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udelay (200000);
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/* wait some time, then remove data */
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*(vu_long *) (SM501_MMIO_BASE +
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SM501_PANEL_DISPLAY_CONTROL) &= ~SM501_PDC_DATA;
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udelay (1000);
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/* and remove VDD last */
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*(vu_long *) (SM501_MMIO_BASE +
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SM501_PANEL_DISPLAY_CONTROL) &=
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~SM501_PDC_VDDEN;
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return 0;
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} else if (strncmp (argv[1], "bl", 2) == 0) {
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/* turn on/off backlight only */
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if (strncmp (argv[2], "on", 2) == 0) {
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*(vu_long *) (SM501_MMIO_BASE +
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SM501_PANEL_DISPLAY_CONTROL) |=
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SM501_PDC_BIAS;
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udelay (1000);
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*(vu_long *) (SM501_MMIO_BASE +
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SM501_PANEL_DISPLAY_CONTROL) |=
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SM501_PDC_FPEN;
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return 0;
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} else if (strncmp (argv[2], "off", 3) == 0) {
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*(vu_long *) (SM501_MMIO_BASE +
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SM501_PANEL_DISPLAY_CONTROL) &=
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~SM501_PDC_FPEN;
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udelay (1000);
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*(vu_long *) (SM501_MMIO_BASE +
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SM501_PANEL_DISPLAY_CONTROL) &=
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~SM501_PDC_BIAS;
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return 0;
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}
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}
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#ifdef CONFIG_BC3450_CRT
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else if (strncmp (argv[1], "crt", 3) == 0) {
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/* enables/disables the crt output (debug only) */
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if (strncmp (argv[2], "on", 2) == 0) {
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*(vu_long *) (SM501_MMIO_BASE +
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SM501_CRT_DISPLAY_CONTROL) |=
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(SM501_CDC_TE | SM501_CDC_E);
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*(vu_long *) (SM501_MMIO_BASE +
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SM501_CRT_DISPLAY_CONTROL) &=
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~SM501_CDC_SEL;
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return 0;
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} else if (strncmp (argv[2], "off", 3) == 0) {
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*(vu_long *) (SM501_MMIO_BASE +
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SM501_CRT_DISPLAY_CONTROL) &=
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~(SM501_CDC_TE | SM501_CDC_E);
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*(vu_long *) (SM501_MMIO_BASE +
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SM501_CRT_DISPLAY_CONTROL) |=
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SM501_CDC_SEL;
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return 0;
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}
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}
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#endif /* CONFIG_BC3450_CRT */
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printf ("Usage:%s\n", cmdtp->help);
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return 1;
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}
|
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U_BOOT_CMD (fp, 3, 1, cmd_fp,
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"front panes access functions",
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"\n"
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"fp bl <on/off>\n"
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" - turns the CCFL backlight of the display on/off\n"
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"fp <on/off>\n" " - turns the whole display on/off"
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#ifdef CONFIG_BC3450_CRT
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"\n"
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"fp crt <on/off>\n"
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" - enables/disables the crt output (debug only)"
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#endif /* CONFIG_BC3450_CRT */
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);
|
|
|
|
/*
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* temp - DS1620 thermometer
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*/
|
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/* GERSYS BC3450 specific functions */
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static inline void bc_ds1620_set_clk (int clk)
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{
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if (clk)
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*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_LOW) |=
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DS1620_CLK;
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else
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*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_LOW) &=
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~DS1620_CLK;
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}
|
|
|
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static inline void bc_ds1620_set_data (int dat)
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{
|
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if (dat)
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*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_LOW) |=
|
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DS1620_DQ;
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else
|
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*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_LOW) &=
|
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~DS1620_DQ;
|
|
}
|
|
|
|
static inline int bc_ds1620_get_data (void)
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{
|
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vu_long rc;
|
|
|
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rc = *(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_LOW);
|
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rc &= DS1620_DQ;
|
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if (rc != 0)
|
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rc = 1;
|
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return (int) rc;
|
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}
|
|
|
|
static inline void bc_ds1620_set_data_dir (int dir)
|
|
{
|
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if (dir) /* in */
|
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*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_DIR_LOW) &= ~DS1620_DQ;
|
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else /* out */
|
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*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_DIR_LOW) |= DS1620_DQ;
|
|
}
|
|
|
|
static inline void bc_ds1620_set_reset (int res)
|
|
{
|
|
if (res)
|
|
*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_LOW) |= DS1620_RES;
|
|
else
|
|
*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_LOW) &= ~DS1620_RES;
|
|
}
|
|
|
|
/* hardware independent functions */
|
|
static void ds1620_send_bits (int nr, int value)
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < nr; i++) {
|
|
bc_ds1620_set_data (value & 1);
|
|
bc_ds1620_set_clk (0);
|
|
udelay (1);
|
|
bc_ds1620_set_clk (1);
|
|
udelay (1);
|
|
|
|
value >>= 1;
|
|
}
|
|
}
|
|
|
|
static unsigned int ds1620_recv_bits (int nr)
|
|
{
|
|
unsigned int value = 0, mask = 1;
|
|
int i;
|
|
|
|
bc_ds1620_set_data (0);
|
|
|
|
for (i = 0; i < nr; i++) {
|
|
bc_ds1620_set_clk (0);
|
|
udelay (1);
|
|
|
|
if (bc_ds1620_get_data ())
|
|
value |= mask;
|
|
|
|
mask <<= 1;
|
|
|
|
bc_ds1620_set_clk (1);
|
|
udelay (1);
|
|
}
|
|
|
|
return value;
|
|
}
|
|
|
|
static void ds1620_out (int cmd, int bits, int value)
|
|
{
|
|
bc_ds1620_set_clk (1);
|
|
bc_ds1620_set_data_dir (0);
|
|
|
|
bc_ds1620_set_reset (0);
|
|
udelay (1);
|
|
bc_ds1620_set_reset (1);
|
|
|
|
udelay (1);
|
|
|
|
ds1620_send_bits (8, cmd);
|
|
if (bits)
|
|
ds1620_send_bits (bits, value);
|
|
|
|
udelay (1);
|
|
|
|
/* go stand alone */
|
|
bc_ds1620_set_data_dir (1);
|
|
bc_ds1620_set_reset (0);
|
|
bc_ds1620_set_clk (0);
|
|
|
|
udelay (10000);
|
|
}
|
|
|
|
static unsigned int ds1620_in (int cmd, int bits)
|
|
{
|
|
unsigned int value;
|
|
|
|
bc_ds1620_set_clk (1);
|
|
bc_ds1620_set_data_dir (0);
|
|
|
|
bc_ds1620_set_reset (0);
|
|
udelay (1);
|
|
bc_ds1620_set_reset (1);
|
|
|
|
udelay (1);
|
|
|
|
ds1620_send_bits (8, cmd);
|
|
|
|
bc_ds1620_set_data_dir (1);
|
|
value = ds1620_recv_bits (bits);
|
|
|
|
/* go stand alone */
|
|
bc_ds1620_set_data_dir (1);
|
|
bc_ds1620_set_reset (0);
|
|
bc_ds1620_set_clk (0);
|
|
|
|
return value;
|
|
}
|
|
|
|
static int cvt_9_to_int (unsigned int val)
|
|
{
|
|
if (val & 0x100)
|
|
val |= 0xfffffe00;
|
|
|
|
return val;
|
|
}
|
|
|
|
/* set thermostate thresholds */
|
|
static void ds1620_write_state (struct therm *therm)
|
|
{
|
|
ds1620_out (THERM_WRITE_TL, 9, therm->lo);
|
|
ds1620_out (THERM_WRITE_TH, 9, therm->hi);
|
|
ds1620_out (THERM_START_CONVERT, 0, 0);
|
|
}
|
|
|
|
static int cmd_temp (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
|
|
{
|
|
int i;
|
|
struct therm therm;
|
|
|
|
sm501_gpio_init ();
|
|
|
|
/* print temperature */
|
|
if (argc == 1) {
|
|
i = cvt_9_to_int (ds1620_in (THERM_READ_TEMP, 9));
|
|
printf ("%d.%d C\n", i >> 1, i & 1 ? 5 : 0);
|
|
return 0;
|
|
}
|
|
|
|
/* set to default operation */
|
|
if (strncmp (argv[1], "set", 3) == 0) {
|
|
if (strncmp (argv[2], "default", 3) == 0) {
|
|
therm.hi = +88;
|
|
therm.lo = -20;
|
|
therm.hi <<= 1;
|
|
therm.lo <<= 1;
|
|
ds1620_write_state (&therm);
|
|
ds1620_out (THERM_WRITE_CONFIG, 8, CONFIG_SYS_STANDALONE);
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
printf ("Usage:%s\n", cmdtp->help);
|
|
return 1;
|
|
}
|
|
|
|
U_BOOT_CMD (temp, 3, 1, cmd_temp,
|
|
"print current temperature",
|
|
"\n" "temp\n" " - print current temperature");
|
|
|
|
#ifdef CONFIG_BC3450_CAN
|
|
/*
|
|
* Initialise CAN interface
|
|
*
|
|
* return 1 on CAN initialization failure
|
|
* return 0 if no failure
|
|
*/
|
|
int can_init (void)
|
|
{
|
|
static int init_done = 0;
|
|
int i;
|
|
struct mpc5xxx_mscan *can1 =
|
|
(struct mpc5xxx_mscan *) (CONFIG_SYS_MBAR + 0x0900);
|
|
struct mpc5xxx_mscan *can2 =
|
|
(struct mpc5xxx_mscan *) (CONFIG_SYS_MBAR + 0x0980);
|
|
|
|
/* GPIO configuration of the CAN pins is done in BC3450.h */
|
|
|
|
if (!init_done) {
|
|
/* init CAN 1 */
|
|
can1->canctl1 |= 0x80; /* CAN enable */
|
|
udelay (100);
|
|
|
|
i = 0;
|
|
can1->canctl0 |= 0x02; /* sleep mode */
|
|
/* wait until sleep mode reached */
|
|
while (!(can1->canctl1 & 0x02)) {
|
|
udelay (10);
|
|
i++;
|
|
if (i == 10) {
|
|
printf ("%s: CAN1 initialize error, "
|
|
"can not enter sleep mode!\n",
|
|
__FUNCTION__);
|
|
return 1;
|
|
}
|
|
}
|
|
i = 0;
|
|
can1->canctl0 = 0x01; /* enter init mode */
|
|
/* wait until init mode reached */
|
|
while (!(can1->canctl1 & 0x01)) {
|
|
udelay (10);
|
|
i++;
|
|
if (i == 10) {
|
|
printf ("%s: CAN1 initialize error, "
|
|
"can not enter init mode!\n",
|
|
__FUNCTION__);
|
|
return 1;
|
|
}
|
|
}
|
|
can1->canctl1 = 0x80;
|
|
can1->canctl1 |= 0x40;
|
|
can1->canbtr0 = 0x0F;
|
|
can1->canbtr1 = 0x7F;
|
|
can1->canidac &= ~(0x30);
|
|
can1->canidar1 = 0x00;
|
|
can1->canidar3 = 0x00;
|
|
can1->canidar5 = 0x00;
|
|
can1->canidar7 = 0x00;
|
|
can1->canidmr0 = 0xFF;
|
|
can1->canidmr1 = 0xFF;
|
|
can1->canidmr2 = 0xFF;
|
|
can1->canidmr3 = 0xFF;
|
|
can1->canidmr4 = 0xFF;
|
|
can1->canidmr5 = 0xFF;
|
|
can1->canidmr6 = 0xFF;
|
|
can1->canidmr7 = 0xFF;
|
|
|
|
i = 0;
|
|
can1->canctl0 &= ~(0x01); /* leave init mode */
|
|
can1->canctl0 &= ~(0x02);
|
|
/* wait until init and sleep mode left */
|
|
while ((can1->canctl1 & 0x01) || (can1->canctl1 & 0x02)) {
|
|
udelay (10);
|
|
i++;
|
|
if (i == 10) {
|
|
printf ("%s: CAN1 initialize error, "
|
|
"can not leave init/sleep mode!\n",
|
|
__FUNCTION__);
|
|
return 1;
|
|
}
|
|
}
|
|
|
|
/* init CAN 2 */
|
|
can2->canctl1 |= 0x80; /* CAN enable */
|
|
udelay (100);
|
|
|
|
i = 0;
|
|
can2->canctl0 |= 0x02; /* sleep mode */
|
|
/* wait until sleep mode reached */
|
|
while (!(can2->canctl1 & 0x02)) {
|
|
udelay (10);
|
|
i++;
|
|
if (i == 10) {
|
|
printf ("%s: CAN2 initialize error, "
|
|
"can not enter sleep mode!\n",
|
|
__FUNCTION__);
|
|
return 1;
|
|
}
|
|
}
|
|
i = 0;
|
|
can2->canctl0 = 0x01; /* enter init mode */
|
|
/* wait until init mode reached */
|
|
while (!(can2->canctl1 & 0x01)) {
|
|
udelay (10);
|
|
i++;
|
|
if (i == 10) {
|
|
printf ("%s: CAN2 initialize error, "
|
|
"can not enter init mode!\n",
|
|
__FUNCTION__);
|
|
return 1;
|
|
}
|
|
}
|
|
can2->canctl1 = 0x80;
|
|
can2->canctl1 |= 0x40;
|
|
can2->canbtr0 = 0x0F;
|
|
can2->canbtr1 = 0x7F;
|
|
can2->canidac &= ~(0x30);
|
|
can2->canidar1 = 0x00;
|
|
can2->canidar3 = 0x00;
|
|
can2->canidar5 = 0x00;
|
|
can2->canidar7 = 0x00;
|
|
can2->canidmr0 = 0xFF;
|
|
can2->canidmr1 = 0xFF;
|
|
can2->canidmr2 = 0xFF;
|
|
can2->canidmr3 = 0xFF;
|
|
can2->canidmr4 = 0xFF;
|
|
can2->canidmr5 = 0xFF;
|
|
can2->canidmr6 = 0xFF;
|
|
can2->canidmr7 = 0xFF;
|
|
can2->canctl0 &= ~(0x01); /* leave init mode */
|
|
can2->canctl0 &= ~(0x02);
|
|
|
|
i = 0;
|
|
/* wait until init mode left */
|
|
while ((can2->canctl1 & 0x01) || (can2->canctl1 & 0x02)) {
|
|
udelay (10);
|
|
i++;
|
|
if (i == 10) {
|
|
printf ("%s: CAN2 initialize error, "
|
|
"can not leave init/sleep mode!\n",
|
|
__FUNCTION__);
|
|
return 1;
|
|
}
|
|
}
|
|
init_done = 1;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Do CAN test
|
|
* by sending message between CAN1 and CAN2
|
|
*
|
|
* return 1 on CAN failure
|
|
* return 0 if no failure
|
|
*/
|
|
int do_can (char * const argv[])
|
|
{
|
|
int i;
|
|
struct mpc5xxx_mscan *can1 =
|
|
(struct mpc5xxx_mscan *) (CONFIG_SYS_MBAR + 0x0900);
|
|
struct mpc5xxx_mscan *can2 =
|
|
(struct mpc5xxx_mscan *) (CONFIG_SYS_MBAR + 0x0980);
|
|
|
|
/* send a message on CAN1 */
|
|
can1->cantbsel = 0x01;
|
|
can1->cantxfg.idr[0] = 0x55;
|
|
can1->cantxfg.idr[1] = 0x00;
|
|
can1->cantxfg.idr[1] &= ~0x8;
|
|
can1->cantxfg.idr[1] &= ~0x10;
|
|
can1->cantxfg.dsr[0] = 0xCC;
|
|
can1->cantxfg.dlr = 1;
|
|
can1->cantxfg.tbpr = 0;
|
|
can1->cantflg = 0x01;
|
|
|
|
i = 0;
|
|
while ((can1->cantflg & 0x01) == 0) {
|
|
i++;
|
|
if (i == 10) {
|
|
printf ("%s: CAN1 send timeout, "
|
|
"can not send message!\n", __FUNCTION__);
|
|
return 1;
|
|
}
|
|
udelay (1000);
|
|
}
|
|
udelay (1000);
|
|
|
|
i = 0;
|
|
while (!(can2->canrflg & 0x01)) {
|
|
i++;
|
|
if (i == 10) {
|
|
printf ("%s: CAN2 receive timeout, "
|
|
"no message received!\n", __FUNCTION__);
|
|
return 1;
|
|
}
|
|
udelay (1000);
|
|
}
|
|
|
|
if (can2->canrxfg.dsr[0] != 0xCC) {
|
|
printf ("%s: CAN2 receive error, "
|
|
"data mismatch!\n", __FUNCTION__);
|
|
return 1;
|
|
}
|
|
|
|
/* send a message on CAN2 */
|
|
can2->cantbsel = 0x01;
|
|
can2->cantxfg.idr[0] = 0x55;
|
|
can2->cantxfg.idr[1] = 0x00;
|
|
can2->cantxfg.idr[1] &= ~0x8;
|
|
can2->cantxfg.idr[1] &= ~0x10;
|
|
can2->cantxfg.dsr[0] = 0xCC;
|
|
can2->cantxfg.dlr = 1;
|
|
can2->cantxfg.tbpr = 0;
|
|
can2->cantflg = 0x01;
|
|
|
|
i = 0;
|
|
while ((can2->cantflg & 0x01) == 0) {
|
|
i++;
|
|
if (i == 10) {
|
|
printf ("%s: CAN2 send error, "
|
|
"can not send message!\n", __FUNCTION__);
|
|
return 1;
|
|
}
|
|
udelay (1000);
|
|
}
|
|
udelay (1000);
|
|
|
|
i = 0;
|
|
while (!(can1->canrflg & 0x01)) {
|
|
i++;
|
|
if (i == 10) {
|
|
printf ("%s: CAN1 receive timeout, "
|
|
"no message received!\n", __FUNCTION__);
|
|
return 1;
|
|
}
|
|
udelay (1000);
|
|
}
|
|
|
|
if (can1->canrxfg.dsr[0] != 0xCC) {
|
|
printf ("%s: CAN1 receive error 0x%02x\n",
|
|
__FUNCTION__, (can1->canrxfg.dsr[0]));
|
|
return 1;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
#endif /* CONFIG_BC3450_CAN */
|
|
|
|
/*
|
|
* test - BC3450 HW test routines
|
|
*/
|
|
int cmd_test (cmd_tbl_t * cmdtp, int flag, int argc, char * const argv[])
|
|
{
|
|
#ifdef CONFIG_BC3450_CAN
|
|
int rcode;
|
|
|
|
can_init ();
|
|
#endif /* CONFIG_BC3450_CAN */
|
|
|
|
sm501_gpio_init ();
|
|
|
|
if (argc != 2) {
|
|
printf ("Usage:%s\n", cmdtp->help);
|
|
return 1;
|
|
}
|
|
|
|
if (strncmp (argv[1], "unit-off", 8) == 0) {
|
|
printf ("waiting 2 seconds...\n");
|
|
udelay (2000000);
|
|
*(vu_long *) (SM501_MMIO_BASE + SM501_GPIO_DATA_HIGH) &=
|
|
~PWR_OFF;
|
|
return 0;
|
|
}
|
|
#ifdef CONFIG_BC3450_CAN
|
|
else if (strncmp (argv[1], "can", 2) == 0) {
|
|
rcode = do_can (argv);
|
|
if (simple_strtoul (argv[2], NULL, 10) == 2) {
|
|
if (rcode == 0)
|
|
printf ("OK\n");
|
|
else
|
|
printf ("Error\n");
|
|
}
|
|
return rcode;
|
|
}
|
|
#endif /* CONFIG_BC3450_CAN */
|
|
|
|
printf ("Usage:%s\n", cmdtp->help);
|
|
return 1;
|
|
}
|
|
|
|
U_BOOT_CMD (test, 2, 1, cmd_test, "unit test routines", "\n"
|
|
#ifdef CONFIG_BC3450_CAN
|
|
"test can\n"
|
|
" - connect CAN1 (X8) with CAN2 (X9) for this test\n"
|
|
#endif /* CONFIG_BC3450_CAN */
|
|
"test unit-off\n"
|
|
" - turns off the BC3450 unit\n"
|
|
" WARNING: Unsaved environment variables will be lost!"
|
|
);
|
|
#endif
|
|
|