upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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57 lines
1.2 KiB
57 lines
1.2 KiB
/*
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* (C) Copyright 2016 Vasily Khoruzhick <anarsoul@gmail.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <linux/types.h>
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#include <common.h>
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#ifndef CONFIG_SYS_DCACHE_OFF
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void invalidate_dcache_all(void)
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{
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/* Flush/Invalidate I cache */
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asm volatile("mcr p15, 0, %0, c7, c5, 0\n" : : "r"(0));
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/* Flush/Invalidate D cache */
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asm volatile("mcr p15, 0, %0, c7, c6, 0\n" : : "r"(0));
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}
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void flush_dcache_all(void)
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{
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return invalidate_dcache_all();
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}
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void invalidate_dcache_range(unsigned long start, unsigned long stop)
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{
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start &= ~(CONFIG_SYS_CACHELINE_SIZE - 1);
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stop &= ~(CONFIG_SYS_CACHELINE_SIZE - 1);
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while (start <= stop) {
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asm volatile("mcr p15, 0, %0, c7, c6, 1\n" : : "r"(start));
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start += CONFIG_SYS_CACHELINE_SIZE;
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}
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}
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void flush_dcache_range(unsigned long start, unsigned long stop)
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{
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return invalidate_dcache_range(start, stop);
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}
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#else /* #ifndef CONFIG_SYS_DCACHE_OFF */
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void invalidate_dcache_all(void)
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{
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}
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void flush_dcache_all(void)
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{
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}
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#endif /* #ifndef CONFIG_SYS_DCACHE_OFF */
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/*
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* Stub implementations for l2 cache operations
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*/
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__weak void l2_cache_disable(void) {}
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#if CONFIG_IS_ENABLED(SYS_THUMB_BUILD)
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__weak void invalidate_l2_cache(void) {}
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#endif
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