upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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224 lines
5.8 KiB
224 lines
5.8 KiB
/*
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* (C) Copyright 2007
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* Matthias Fuchs, esd gmbh, matthias.fuchs@esd-electronics.com.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* Epson RX8025 RTC driver.
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*/
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#include <common.h>
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#include <command.h>
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#include <rtc.h>
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#include <i2c.h>
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#if defined(CONFIG_RTC_RX8025) && defined(CONFIG_CMD_DATE)
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/*---------------------------------------------------------------------*/
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#undef DEBUG_RTC
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#ifdef DEBUG_RTC
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#define DEBUGR(fmt,args...) printf(fmt ,##args)
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#else
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#define DEBUGR(fmt,args...)
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#endif
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/*---------------------------------------------------------------------*/
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#ifndef CFG_I2C_RTC_ADDR
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# define CFG_I2C_RTC_ADDR 0x32
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#endif
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/*
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* RTC register addresses
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*/
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#define RTC_SEC_REG_ADDR 0x00
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#define RTC_MIN_REG_ADDR 0x01
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#define RTC_HR_REG_ADDR 0x02
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#define RTC_DAY_REG_ADDR 0x03
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#define RTC_DATE_REG_ADDR 0x04
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#define RTC_MON_REG_ADDR 0x05
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#define RTC_YR_REG_ADDR 0x06
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#define RTC_CTL1_REG_ADDR 0x0e
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#define RTC_CTL2_REG_ADDR 0x0f
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/*
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* Control register 1 bits
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*/
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#define RTC_CTL1_BIT_2412 0x20
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/*
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* Control register 2 bits
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*/
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#define RTC_CTL2_BIT_PON 0x10
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#define RTC_CTL2_BIT_VDET 0x40
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#define RTC_CTL2_BIT_XST 0x20
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#define RTC_CTL2_BIT_VDSL 0x80
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/*
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* Note: the RX8025 I2C RTC requires register
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* reads and write to consist of a single bus
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* cycle. It is not allowed to write the register
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* address in a first cycle that is terminated by
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* a STOP condition. The chips needs a 'restart'
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* sequence (start sequence without a prior stop).
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* This driver has been written for a 4xx board.
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* U-Boot's 4xx i2c driver is currently not capable
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* to generate such cycles to some work arounds
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* are used.
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*/
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/* static uchar rtc_read (uchar reg); */
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#define rtc_read(reg) buf[((reg) + 1) & 0xf]
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static void rtc_write (uchar reg, uchar val);
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static uchar bin2bcd (unsigned int n);
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static unsigned bcd2bin (uchar c);
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/*
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* Get the current time from the RTC
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*/
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void rtc_get (struct rtc_time *tmp)
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{
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uchar sec, min, hour, mday, wday, mon, year, ctl2;
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uchar buf[16];
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if (i2c_read(CFG_I2C_RTC_ADDR, 0, 0, buf, 16))
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printf("Error reading from RTC\n");
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sec = rtc_read(RTC_SEC_REG_ADDR);
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min = rtc_read(RTC_MIN_REG_ADDR);
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hour = rtc_read(RTC_HR_REG_ADDR);
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wday = rtc_read(RTC_DAY_REG_ADDR);
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mday = rtc_read(RTC_DATE_REG_ADDR);
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mon = rtc_read(RTC_MON_REG_ADDR);
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year = rtc_read(RTC_YR_REG_ADDR);
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DEBUGR ("Get RTC year: %02x mon: %02x mday: %02x wday: %02x "
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"hr: %02x min: %02x sec: %02x\n",
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year, mon, mday, wday, hour, min, sec);
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/* dump status */
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ctl2 = rtc_read(RTC_CTL2_REG_ADDR);
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if (ctl2 & RTC_CTL2_BIT_PON)
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printf("RTC: power-on detected\n");
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if (ctl2 & RTC_CTL2_BIT_VDET)
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printf("RTC: voltage drop detected\n");
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if (!(ctl2 & RTC_CTL2_BIT_XST))
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printf("RTC: oscillator stop detected\n");
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tmp->tm_sec = bcd2bin (sec & 0x7F);
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tmp->tm_min = bcd2bin (min & 0x7F);
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tmp->tm_hour = bcd2bin (hour & 0x3F);
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tmp->tm_mday = bcd2bin (mday & 0x3F);
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tmp->tm_mon = bcd2bin (mon & 0x1F);
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tmp->tm_year = bcd2bin (year) + ( bcd2bin (year) >= 70 ? 1900 : 2000);
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tmp->tm_wday = bcd2bin (wday & 0x07);
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tmp->tm_yday = 0;
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tmp->tm_isdst= 0;
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DEBUGR ("Get DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
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tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
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tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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}
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/*
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* Set the RTC
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*/
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void rtc_set (struct rtc_time *tmp)
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{
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DEBUGR ("Set DATE: %4d-%02d-%02d (wday=%d) TIME: %2d:%02d:%02d\n",
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tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
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tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
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if (tmp->tm_year < 1970 || tmp->tm_year > 2069)
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printf("WARNING: year should be between 1970 and 2069!\n");
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rtc_write (RTC_YR_REG_ADDR, bin2bcd (tmp->tm_year % 100));
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rtc_write (RTC_MON_REG_ADDR, bin2bcd (tmp->tm_mon));
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rtc_write (RTC_DAY_REG_ADDR, bin2bcd (tmp->tm_wday));
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rtc_write (RTC_DATE_REG_ADDR, bin2bcd (tmp->tm_mday));
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rtc_write (RTC_HR_REG_ADDR, bin2bcd (tmp->tm_hour));
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rtc_write (RTC_MIN_REG_ADDR, bin2bcd (tmp->tm_min));
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rtc_write (RTC_SEC_REG_ADDR, bin2bcd (tmp->tm_sec));
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rtc_write (RTC_CTL1_REG_ADDR, RTC_CTL1_BIT_2412);
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}
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/*
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* Reset the RTC. We setting the date back to 1970-01-01.
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*/
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void rtc_reset (void)
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{
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struct rtc_time tmp;
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uchar buf[16];
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uchar ctl2;
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if (i2c_read(CFG_I2C_RTC_ADDR, 0, 0, buf, 16))
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printf("Error reading from RTC\n");
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ctl2 = rtc_read(RTC_CTL2_REG_ADDR);
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ctl2 &= ~(RTC_CTL2_BIT_PON | RTC_CTL2_BIT_VDET);
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ctl2 |= RTC_CTL2_BIT_XST | RTC_CTL2_BIT_VDSL;
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rtc_write (RTC_CTL2_REG_ADDR, ctl2);
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tmp.tm_year = 1970;
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tmp.tm_mon = 1;
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tmp.tm_mday= 1;
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tmp.tm_hour = 0;
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tmp.tm_min = 0;
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tmp.tm_sec = 0;
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rtc_set(&tmp);
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printf ( "RTC: %4d-%02d-%02d %2d:%02d:%02d UTC\n",
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tmp.tm_year, tmp.tm_mon, tmp.tm_mday,
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tmp.tm_hour, tmp.tm_min, tmp.tm_sec);
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return;
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}
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/*
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* Helper functions
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*/
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static void rtc_write (uchar reg, uchar val)
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{
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uchar buf[2];
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buf[0] = reg << 4;
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buf[1] = val;
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if (i2c_write(CFG_I2C_RTC_ADDR, 0, 0, buf, 2) != 0)
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printf("Error writing to RTC\n");
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}
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static unsigned bcd2bin (uchar n)
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{
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return ((((n >> 4) & 0x0F) * 10) + (n & 0x0F));
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}
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static unsigned char bin2bcd (unsigned int n)
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{
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return (((n / 10) << 4) | (n % 10));
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}
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#endif /* CONFIG_RTC_RX8025 && CONFIG_CMD_DATE */
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