upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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200 lines
5.1 KiB
200 lines
5.1 KiB
/*
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* Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
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*
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* Based on da830evm.c. Original Copyrights follow:
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*
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* Copyright (C) 2009 Nick Thompson, GE Fanuc, Ltd. <nick.thompson@gefanuc.com>
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* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <common.h>
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#include <i2c.h>
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#include <net.h>
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#include <netdev.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/emif_defs.h>
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#include <asm/arch/emac_defs.h>
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#include <asm/io.h>
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#include "../common/misc.h"
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#include "common.h"
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DECLARE_GLOBAL_DATA_PTR;
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#define pinmux(x) (&davinci_syscfg_regs->pinmux[x])
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/* SPI0 pin muxer settings */
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static const struct pinmux_config spi1_pins[] = {
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{ pinmux(5), 1, 1 },
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{ pinmux(5), 1, 2 },
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{ pinmux(5), 1, 4 },
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{ pinmux(5), 1, 5 }
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};
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/* UART pin muxer settings */
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static const struct pinmux_config uart_pins[] = {
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{ pinmux(0), 4, 6 },
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{ pinmux(0), 4, 7 },
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{ pinmux(4), 2, 4 },
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{ pinmux(4), 2, 5 }
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};
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#ifdef CONFIG_DRIVER_TI_EMAC
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static const struct pinmux_config emac_pins[] = {
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{ pinmux(2), 8, 1 },
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{ pinmux(2), 8, 2 },
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{ pinmux(2), 8, 3 },
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{ pinmux(2), 8, 4 },
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{ pinmux(2), 8, 5 },
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{ pinmux(2), 8, 6 },
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{ pinmux(2), 8, 7 },
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{ pinmux(3), 8, 0 },
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{ pinmux(3), 8, 1 },
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{ pinmux(3), 8, 2 },
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{ pinmux(3), 8, 3 },
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{ pinmux(3), 8, 4 },
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{ pinmux(3), 8, 5 },
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{ pinmux(3), 8, 6 },
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{ pinmux(3), 8, 7 },
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{ pinmux(4), 8, 0 },
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{ pinmux(4), 8, 1 }
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};
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#endif /* CONFIG_DRIVER_TI_EMAC */
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/* I2C pin muxer settings */
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static const struct pinmux_config i2c_pins[] = {
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{ pinmux(4), 2, 2 },
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{ pinmux(4), 2, 3 }
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};
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#ifdef CONFIG_NAND_DAVINCI
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const struct pinmux_config nand_pins[] = {
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{ pinmux(7), 1, 1 },
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{ pinmux(7), 1, 2 },
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{ pinmux(7), 1, 4 },
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{ pinmux(7), 1, 5 },
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{ pinmux(9), 1, 0 },
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{ pinmux(9), 1, 1 },
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{ pinmux(9), 1, 2 },
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{ pinmux(9), 1, 3 },
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{ pinmux(9), 1, 4 },
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{ pinmux(9), 1, 5 },
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{ pinmux(9), 1, 6 },
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{ pinmux(9), 1, 7 },
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{ pinmux(12), 1, 5 },
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{ pinmux(12), 1, 6 }
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};
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#endif
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static const struct pinmux_resource pinmuxes[] = {
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#ifdef CONFIG_SPI_FLASH
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PINMUX_ITEM(spi1_pins),
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#endif
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PINMUX_ITEM(uart_pins),
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PINMUX_ITEM(i2c_pins),
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#ifdef CONFIG_NAND_DAVINCI
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PINMUX_ITEM(nand_pins),
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#endif
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};
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static const struct lpsc_resource lpsc[] = {
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{ DAVINCI_LPSC_AEMIF }, /* NAND, NOR */
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{ DAVINCI_LPSC_SPI1 }, /* Serial Flash */
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{ DAVINCI_LPSC_EMAC }, /* image download */
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{ DAVINCI_LPSC_UART2 }, /* console */
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{ DAVINCI_LPSC_GPIO },
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};
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int board_init(void)
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{
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#ifndef CONFIG_USE_IRQ
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irq_init();
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#endif
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#ifdef CONFIG_NAND_DAVINCI
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/*
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* NAND CS setup - cycle counts based on da850evm NAND timings in the
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* Linux kernel @ 25MHz EMIFA
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*/
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writel((DAVINCI_ABCR_WSETUP(0) |
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DAVINCI_ABCR_WSTROBE(0) |
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DAVINCI_ABCR_WHOLD(0) |
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DAVINCI_ABCR_RSETUP(0) |
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DAVINCI_ABCR_RSTROBE(1) |
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DAVINCI_ABCR_RHOLD(0) |
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DAVINCI_ABCR_TA(0) |
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DAVINCI_ABCR_ASIZE_8BIT),
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&davinci_emif_regs->ab2cr); /* CS3 */
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#endif
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/* arch number of the board */
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gd->bd->bi_arch_number = MACH_TYPE_DAVINCI_DA850_EVM;
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/* address of boot parameters */
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gd->bd->bi_boot_params = LINUX_BOOT_PARAM_ADDR;
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/*
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* Power on required peripherals
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* ARM does not have access by default to PSC0 and PSC1
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* assuming here that the DSP bootloader has set the IOPU
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* such that PSC access is available to ARM
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*/
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if (da8xx_configure_lpsc_items(lpsc, ARRAY_SIZE(lpsc)))
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return 1;
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/* setup the SUSPSRC for ARM to control emulation suspend */
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writel(readl(&davinci_syscfg_regs->suspsrc) &
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~(DAVINCI_SYSCFG_SUSPSRC_EMAC | DAVINCI_SYSCFG_SUSPSRC_I2C |
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DAVINCI_SYSCFG_SUSPSRC_SPI1 | DAVINCI_SYSCFG_SUSPSRC_TIMER0 |
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DAVINCI_SYSCFG_SUSPSRC_UART2),
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&davinci_syscfg_regs->suspsrc);
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/* configure pinmux settings */
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if (davinci_configure_pin_mux_items(pinmuxes, ARRAY_SIZE(pinmuxes)))
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return 1;
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#ifdef CONFIG_DRIVER_TI_EMAC
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if (davinci_configure_pin_mux(emac_pins, ARRAY_SIZE(emac_pins)) != 0)
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return 1;
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/* set cfgchip3 to select MII */
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writel(readl(&davinci_syscfg_regs->cfgchip3) & ~(1 << 8),
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&davinci_syscfg_regs->cfgchip3);
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#endif /* CONFIG_DRIVER_TI_EMAC */
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/* enable the console UART */
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writel((DAVINCI_UART_PWREMU_MGMT_FREE | DAVINCI_UART_PWREMU_MGMT_URRST |
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DAVINCI_UART_PWREMU_MGMT_UTRST),
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&davinci_uart2_ctrl_regs->pwremu_mgmt);
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return 0;
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}
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#ifdef CONFIG_DRIVER_TI_EMAC
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/*
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* Initializes on-board ethernet controllers.
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*/
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int board_eth_init(bd_t *bis)
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{
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if (!davinci_emac_initialize()) {
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printf("Error: Ethernet init failed!\n");
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return -1;
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}
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return 0;
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}
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#endif /* CONFIG_DRIVER_TI_EMAC */
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