upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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259 lines
6.7 KiB
259 lines
6.7 KiB
/*
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* (C) Copyright 2015-2016 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*
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* Configuration settings for the Freescale S32V234 EVB board.
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#ifndef CONFIG_SPL_BUILD
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#include <config_distro_defaults.h>
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#endif
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#include <asm/arch/imx-regs.h>
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#define CONFIG_S32V234
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#define CONFIG_DM
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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/* Config GIC */
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#define CONFIG_GICV2
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#define GICD_BASE 0x7D001000
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#define GICC_BASE 0x7D002000
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#define CONFIG_REMAKE_ELF
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#undef CONFIG_RUN_FROM_IRAM_ONLY
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#define CONFIG_RUN_FROM_DDR1
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#undef CONFIG_RUN_FROM_DDR0
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/* Run by default from DDR1 */
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#ifdef CONFIG_RUN_FROM_DDR0
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#define DDR_BASE_ADDR 0x80000000
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#else
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#define DDR_BASE_ADDR 0xC0000000
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#endif
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#define CONFIG_MACH_TYPE 4146
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#define CONFIG_SKIP_LOWLEVEL_INIT
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/* Config CACHE */
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#define CONFIG_CMD_CACHE
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#define CONFIG_SYS_FULL_VA
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/* Enable passing of ATAGs */
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#define CONFIG_CMDLINE_TAG
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/* SMP Spin Table Definitions */
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#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
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/* Generic Timer Definitions */
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#define COUNTER_FREQUENCY (1000000000) /* 1000MHz */
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#define CONFIG_SYS_FSL_ERRATUM_A008585
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/* Size of malloc() pool */
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#ifdef CONFIG_RUN_FROM_IRAM_ONLY
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1 * 1024 * 1024)
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#else
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#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
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#endif
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_DM_SERIAL
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#define CONFIG_FSL_LINFLEXUART
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#define LINFLEXUART_BASE LINFLEXD0_BASE_ADDR
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#define CONFIG_DEBUG_UART_LINFLEXUART
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#define CONFIG_DEBUG_UART_BASE LINFLEXUART_BASE
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/* Allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_SYS_UART_PORT (1)
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#define CONFIG_BAUDRATE 115200
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#undef CONFIG_CMD_IMLS
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#define CONFIG_MMC
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#define CONFIG_FSL_ESDHC
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#define CONFIG_FSL_USDHC
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#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC_BASE_ADDR
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#define CONFIG_SYS_FSL_ESDHC_NUM 1
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#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
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#define CONFIG_CMD_MMC
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#define CONFIG_GENERIC_MMC
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/* #define CONFIG_CMD_EXT2 EXT2 Support */
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#define CONFIG_CMD_FAT /* FAT support */
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#define CONFIG_DOS_PARTITION
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#if 0
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/* Ethernet config */
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_MII
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#define CONFIG_FEC_MXC
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#define CONFIG_MII
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#define IMX_FEC_BASE ENET_BASE_ADDR
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#define CONFIG_FEC_XCV_TYPE RMII
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#define CONFIG_FEC_MXC_PHYADDR 0
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#define CONFIG_PHYLIB
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#define CONFIG_PHY_MICREL
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#endif
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#if 0 /* Disable until the I2C driver will be updated */
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/* I2C Configs */
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#define CONFIG_CMD_I2C
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#define CONFIG_HARD_I2C
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#define CONFIG_I2C_MXC
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#define CONFIG_SYS_I2C_BASE I2C0_BASE_ADDR
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#define CONFIG_SYS_I2C_SPEED 100000
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#endif
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#if 0 /* Disable until the FLASH will be implemented */
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#define CONFIG_SYS_USE_NAND
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#endif
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#ifdef CONFIG_SYS_USE_NAND
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/* Nand Flash Configs */
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#define CONFIG_CMD_NAND
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#define CONFIG_JFFS2_NAND
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#define MTD_NAND_FSL_NFC_SWECC 1
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#define CONFIG_NAND_FSL_NFC
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#define CONFIG_SYS_NAND_BASE 0x400E0000
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define NAND_MAX_CHIPS CONFIG_SYS_MAX_NAND_DEVICE
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#define CONFIG_SYS_NAND_SELECT_DEVICE
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#define CONFIG_SYS_64BIT_VSPRINTF /* needed for nand_util.c */
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#endif
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#define CONFIG_CMD_DHCP
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#define CONFIG_LOADADDR 0xC307FFC0
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#define CONFIG_BOOTARGS "console=ttyLF0 root=/dev/ram rw"
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#define CONFIG_CMD_ENV
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"boot_scripts=boot.scr.uimg boot.scr\0" \
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"scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
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"console=ttyLF0,115200\0" \
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"fdt_file=s32v234-evb.dtb\0" \
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"fdt_high=0xffffffff\0" \
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"initrd_high=0xffffffff\0" \
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"fdt_addr_r=0xC2000000\0" \
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"kernel_addr_r=0xC307FFC0\0" \
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"ramdisk_addr_r=0xC4000000\0" \
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"ramdisk=rootfs.uimg\0"\
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"ip_dyn=yes\0" \
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"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
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"update_sd_firmware_filename=u-boot.imx\0" \
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"update_sd_firmware=" \
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"if test ${ip_dyn} = yes; then " \
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"setenv get_cmd dhcp; " \
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"else " \
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"setenv get_cmd tftp; " \
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"fi; " \
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"if mmc dev ${mmcdev}; then " \
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"if ${get_cmd} ${update_sd_firmware_filename}; then " \
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"setexpr fw_sz ${filesize} / 0x200; " \
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"setexpr fw_sz ${fw_sz} + 1; " \
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"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
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"fi; " \
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"fi\0" \
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"loadramdisk=fatload mmc ${mmcdev}:${mmcpart} ${ramdisk_addr} ${ramdisk}\0" \
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"jtagboot=echo Booting using jtag...; " \
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"bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
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"jtagsdboot=echo Booting loading Linux with ramdisk from SD...; " \
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"run loaduimage; run loadramdisk; run loadfdt;"\
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"bootm ${kernel_addr} ${ramdisk_addr} ${fdt_addr}\0" \
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"boot_net_usb_start=true\0" \
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BOOTENV
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#define BOOT_TARGET_DEVICES(func) \
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func(MMC, mmc, 1) \
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func(MMC, mmc, 0) \
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func(DHCP, dhcp, na)
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#define CONFIG_BOOTCOMMAND \
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"run distro_bootcmd"
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#include <config_distro_bootcmd.h>
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_LONGHELP /* undef to save memory */
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#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
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#define CONFIG_SYS_PROMPT "=> "
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#undef CONFIG_AUTO_COMPLETE
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#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
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#define CONFIG_SYS_PBSIZE \
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(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_CMD_MEMTEST
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#define CONFIG_SYS_MEMTEST_START (DDR_BASE_ADDR)
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#define CONFIG_SYS_MEMTEST_END (DDR_BASE_ADDR + 0x7C00000)
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_SYS_TEXT_BASE 0x3E800000 /* SDRAM */
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#ifdef CONFIG_RUN_FROM_IRAM_ONLY
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#define CONFIG_SYS_MALLOC_BASE (DDR_BASE_ADDR)
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#endif
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/*
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* Stack sizes
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* The stack sizes are set up in start.S using the settings below
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*/
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#define CONFIG_STACKSIZE (128 * 1024) /* regular stack */
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#if 0
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/* Configure PXE */
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#define CONFIG_CMD_PXE
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#define CONFIG_BOOTP_PXE
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#define CONFIG_BOOTP_PXE_CLIENTARCH 0x100
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#endif
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/* Physical memory map */
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/* EVB board has 2x256 MB DDR chips, DDR0 and DDR1, u-boot is using just one */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM (DDR_BASE_ADDR)
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#define PHYS_SDRAM_SIZE (256 * 1024 * 1024)
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/* FLASH and environment organization */
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_ENV_SIZE (8 * 1024)
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#define CONFIG_ENV_IS_IN_MMC
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#define CONFIG_ENV_OFFSET (12 * 64 * 1024)
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#define CONFIG_BOOTP_BOOTFILESIZE
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#define CONFIG_BOOTP_BOOTPATH
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#define CONFIG_BOOTP_GATEWAY
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#define CONFIG_BOOTP_HOSTNAME
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#endif
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