upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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54 lines
1.4 KiB
54 lines
1.4 KiB
/*
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* include/configs/salvator-x.h
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* This file is Salvator-X board configuration.
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*
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* Copyright (C) 2015 Renesas Electronics Corporation
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __SALVATOR_X_H
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#define __SALVATOR_X_H
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#undef DEBUG
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#define CONFIG_RCAR_BOARD_STRING "Salvator-X"
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#include "rcar-gen3-common.h"
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/* SCIF */
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#define CONFIG_SCIF_CONSOLE
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#define CONFIG_CONS_SCIF2
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#define CONFIG_CONS_INDEX 2
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#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
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/* [A] Hyper Flash */
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/* use to RPC(SPI Multi I/O Bus Controller) */
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_ENV_IS_NOWHERE
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/* Board Clock */
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/* XTAL_CLK : 33.33MHz */
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#define RCAR_XTAL_CLK 33333333u
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#define CONFIG_SYS_CLK_FREQ RCAR_XTAL_CLK
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/* ch0to2 CPclk, ch3to11 S3D2_PEREclk, ch12to14 S3D2_RTclk */
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/* CPclk 16.66MHz, S3D2 133.33MHz */
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#define CONFIG_CP_CLK_FREQ (CONFIG_SYS_CLK_FREQ / 2)
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#define CONFIG_PLL1_CLK_FREQ (CONFIG_SYS_CLK_FREQ * 192 / 2)
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#define CONFIG_S3D2_CLK_FREQ (266666666u/2)
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/* Generic Timer Definitions (use in assembler source) */
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#define COUNTER_FREQUENCY 0xFE502A /* 16.66MHz from CPclk */
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/* Generic Interrupt Controller Definitions */
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#define CONFIG_GICV2
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#define GICD_BASE 0xF1010000
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#define GICC_BASE 0xF1020000
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/* Module stop status bits */
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/* MFIS, SCIF1 */
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#define CONFIG_SMSTP2_ENA 0x00002040
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/* INTC-AP, IRQC */
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#define CONFIG_SMSTP4_ENA 0x00000180
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#endif /* __SALVATOR_X_H */
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