upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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58 lines
1.2 KiB
58 lines
1.2 KiB
/*
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* (C) Copyright 2008
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* Ricado Ribalda-Universidad Autonoma de Madrid-ricardo.ribalda@gmail.com
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* This work has been supported by: QTechnology http://qtec.com/
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <config.h>
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#include <common.h>
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#include <netdev.h>
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#include <asm/processor.h>
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int checkboard(void)
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{
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puts("Xilinx PPC440 Generic Board\n");
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return 0;
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}
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phys_size_t initdram(int board_type)
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{
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return get_ram_size(XPAR_DDR2_SDRAM_MEM_BASEADDR,
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CONFIG_SYS_SDRAM_SIZE_MB * 1024 * 1024);
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}
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void get_sys_info(sys_info_t *sys_info)
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{
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sys_info->freqProcessor = XPAR_CORE_CLOCK_FREQ_HZ;
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sys_info->freqPLB = XPAR_PLB_CLOCK_FREQ_HZ;
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sys_info->freqPCI = 0;
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return;
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}
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int get_serial_clock(void){
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return XPAR_UARTNS550_0_CLOCK_FREQ_HZ;
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}
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int board_eth_init(bd_t *bis)
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{
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int ret = 0;
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puts("Init xilinx temac\n");
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#ifdef XPAR_LLTEMAC_0_BASEADDR
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ret |= xilinx_ll_temac_eth_init(bis, XPAR_LLTEMAC_0_BASEADDR,
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XILINX_LL_TEMAC_M_SDMA_DCR | XILINX_LL_TEMAC_M_SDMA_PLB,
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XPAR_LLTEMAC_0_LLINK_CONNECTED_BASEADDR);
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#endif
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#ifdef XPAR_LLTEMAC_1_BASEADDR
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ret |= xilinx_ll_temac_eth_init(bis, XPAR_LLTEMAC_1_BASEADDR,
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XILINX_LL_TEMAC_M_SDMA_DCR | XILINX_LL_TEMAC_M_SDMA_PLB,
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XPAR_LLTEMAC_1_LLINK_CONNECTED_BASEADDR);
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#endif
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return ret;
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}
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