upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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97 lines
2.8 KiB
97 lines
2.8 KiB
/*
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* Copyright (C) 2004-2006 Atmel Corporation
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/arch/cacheflush.h>
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void dcache_clean_range(volatile void *start, size_t size)
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{
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unsigned long v, begin, end, linesz;
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linesz = CONFIG_SYS_DCACHE_LINESZ;
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/* You asked for it, you got it */
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begin = (unsigned long)start & ~(linesz - 1);
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end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1);
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for (v = begin; v < end; v += linesz)
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dcache_clean_line((void *)v);
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sync_write_buffer();
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}
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void dcache_invalidate_range(volatile void *start, size_t size)
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{
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unsigned long v, begin, end, linesz;
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linesz = CONFIG_SYS_DCACHE_LINESZ;
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/* You asked for it, you got it */
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begin = (unsigned long)start & ~(linesz - 1);
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end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1);
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for (v = begin; v < end; v += linesz)
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dcache_invalidate_line((void *)v);
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}
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void dcache_flush_range(volatile void *start, size_t size)
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{
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unsigned long v, begin, end, linesz;
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linesz = CONFIG_SYS_DCACHE_LINESZ;
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/* You asked for it, you got it */
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begin = (unsigned long)start & ~(linesz - 1);
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end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1);
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for (v = begin; v < end; v += linesz)
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dcache_flush_line((void *)v);
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sync_write_buffer();
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}
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void icache_invalidate_range(volatile void *start, size_t size)
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{
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unsigned long v, begin, end, linesz;
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linesz = CONFIG_SYS_ICACHE_LINESZ;
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/* You asked for it, you got it */
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begin = (unsigned long)start & ~(linesz - 1);
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end = ((unsigned long)start + size + linesz - 1) & ~(linesz - 1);
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for (v = begin; v < end; v += linesz)
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icache_invalidate_line((void *)v);
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}
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/*
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* This is called after loading something into memory. We need to
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* make sure that everything that was loaded is actually written to
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* RAM, and that the icache will look for it. Cleaning the dcache and
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* invalidating the icache will do the trick.
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*/
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void flush_cache (unsigned long start_addr, unsigned long size)
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{
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dcache_clean_range((void *)start_addr, size);
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icache_invalidate_range((void *)start_addr, size);
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}
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