upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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141 lines
4.0 KiB
141 lines
4.0 KiB
/*
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* Copyright 2010-2011 Freescale Semiconductor, Inc.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/fsl_portals.h>
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#include <asm/fsl_liodn.h>
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#ifdef CONFIG_SYS_DPAA_QBMAN
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struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {
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/* dqrr liodn, frame data liodn, liodn off, sdest */
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SET_QP_INFO(1, 2, 1, 0),
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SET_QP_INFO(3, 4, 2, 1),
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SET_QP_INFO(5, 6, 3, 0),
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SET_QP_INFO(7, 8, 4, 1),
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SET_QP_INFO(9, 10, 5, 0),
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SET_QP_INFO(11, 12, 1, 1),
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SET_QP_INFO(13, 14, 2, 0),
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SET_QP_INFO(15, 16, 3, 1),
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SET_QP_INFO(17, 18, 4, 0),
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SET_QP_INFO(19, 20, 5, 1),
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};
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#endif
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struct srio_liodn_id_table srio_liodn_tbl[] = {
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SET_SRIO_LIODN_2(1, 199, 200),
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SET_SRIO_LIODN_2(2, 201, 202),
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};
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int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl);
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struct liodn_id_table liodn_tbl[] = {
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#ifdef CONFIG_SYS_DPAA_QBMAN
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SET_QMAN_LIODN(31),
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SET_BMAN_LIODN(32),
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#endif
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SET_SDHC_LIODN(1, 64),
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SET_PME_LIODN(117),
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SET_USB_LIODN(1, "fsl-usb2-mph", 125),
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SET_USB_LIODN(2, "fsl-usb2-dr", 126),
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SET_SATA_LIODN(1, 127),
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SET_SATA_LIODN(2, 128),
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SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 1, 193),
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SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 2, 194),
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SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 3, 195),
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SET_PCI_LIODN("fsl,qoriq-pcie-v2.2", 4, 196),
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SET_DMA_LIODN(1, 197),
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SET_DMA_LIODN(2, 198),
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SET_GUTS_LIODN("fsl,rapidio-delta", 199, rio1liodnr, 0),
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SET_GUTS_LIODN(NULL, 200, rio2liodnr, 0),
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SET_GUTS_LIODN(NULL, 201, rio1maintliodnr, 0),
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SET_GUTS_LIODN(NULL, 202, rio2maintliodnr, 0),
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};
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int liodn_tbl_sz = ARRAY_SIZE(liodn_tbl);
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#ifdef CONFIG_SYS_DPAA_FMAN
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struct liodn_id_table fman1_liodn_tbl[] = {
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SET_FMAN_RX_1G_LIODN(1, 0, 10),
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SET_FMAN_RX_1G_LIODN(1, 1, 11),
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SET_FMAN_RX_1G_LIODN(1, 2, 12),
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SET_FMAN_RX_1G_LIODN(1, 3, 13),
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SET_FMAN_RX_1G_LIODN(1, 4, 14),
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SET_FMAN_RX_10G_LIODN(1, 0, 15),
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};
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int fman1_liodn_tbl_sz = ARRAY_SIZE(fman1_liodn_tbl);
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#endif
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struct liodn_id_table sec_liodn_tbl[] = {
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SET_SEC_JR_LIODN_ENTRY(0, 129, 130),
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SET_SEC_JR_LIODN_ENTRY(1, 131, 132),
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SET_SEC_JR_LIODN_ENTRY(2, 133, 134),
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SET_SEC_JR_LIODN_ENTRY(3, 135, 136),
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SET_SEC_RTIC_LIODN_ENTRY(a, 154),
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SET_SEC_RTIC_LIODN_ENTRY(b, 155),
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SET_SEC_RTIC_LIODN_ENTRY(c, 156),
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SET_SEC_RTIC_LIODN_ENTRY(d, 157),
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SET_SEC_DECO_LIODN_ENTRY(0, 97, 98),
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SET_SEC_DECO_LIODN_ENTRY(1, 99, 100),
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};
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int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl);
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#ifdef CONFIG_SYS_FSL_RAID_ENGINE
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struct liodn_id_table raide_liodn_tbl[] = {
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SET_RAID_ENGINE_JQ_LIODN_ENTRY(0, 0, 60),
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SET_RAID_ENGINE_JQ_LIODN_ENTRY(0, 1, 61),
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SET_RAID_ENGINE_JQ_LIODN_ENTRY(1, 0, 62),
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SET_RAID_ENGINE_JQ_LIODN_ENTRY(1, 1, 63),
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};
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int raide_liodn_tbl_sz = ARRAY_SIZE(raide_liodn_tbl);
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#endif
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#ifdef CONFIG_SYS_DPAA_RMAN
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struct liodn_id_table rman_liodn_tbl[] = {
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/* Set RMan block 0-3 liodn offset */
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SET_RMAN_LIODN(0, 6),
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SET_RMAN_LIODN(1, 7),
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SET_RMAN_LIODN(2, 8),
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SET_RMAN_LIODN(3, 9),
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};
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int rman_liodn_tbl_sz = ARRAY_SIZE(rman_liodn_tbl);
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#endif
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struct liodn_id_table liodn_bases[] = {
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[FSL_HW_PORTAL_SEC] = SET_LIODN_BASE_2(64, 100),
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#ifdef CONFIG_SYS_DPAA_FMAN
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[FSL_HW_PORTAL_FMAN1] = SET_LIODN_BASE_1(32),
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#endif
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#ifdef CONFIG_SYS_DPAA_PME
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[FSL_HW_PORTAL_PME] = SET_LIODN_BASE_2(136, 172),
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#endif
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#ifdef CONFIG_SYS_FSL_RAID_ENGINE
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[FSL_HW_PORTAL_RAID_ENGINE] = SET_LIODN_BASE_1(47),
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#endif
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#ifdef CONFIG_SYS_DPAA_RMAN
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[FSL_HW_PORTAL_RMAN] = SET_LIODN_BASE_1(80),
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#endif
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};
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