upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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241 lines
6.4 KiB
241 lines
6.4 KiB
/*
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* (C) Copyright 2002
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* Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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* Partly based on msbios.c from rolo 1.6:
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*----------------------------------------------------------------------
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* (C) Copyright 2000
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* Sysgo Real-Time Solutions GmbH
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* Klein-Winternheim, Germany
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*----------------------------------------------------------------------
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*/
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#include <common.h>
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#include <pci.h>
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#include <asm/realmode.h>
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#include <asm/io.h>
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DECLARE_GLOBAL_DATA_PTR;
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#define NUMVECTS 256
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#define BIOS_DATA ((char*)0x400)
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#define BIOS_DATA_SIZE 256
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#define BIOS_BASE ((char*)0xf0000)
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#define BIOS_CS 0xf000
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extern ulong __bios_start;
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extern ulong __bios_size;
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/* these are defined in a 16bit segment and needs
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* to be accessed with the RELOC_16_xxxx() macros below
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*/
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extern u16 ram_in_64kb_chunks;
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extern u16 bios_equipment;
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extern u8 pci_last_bus;
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extern void *rm_int00;
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extern void *rm_int01;
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extern void *rm_int02;
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extern void *rm_int03;
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extern void *rm_int04;
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extern void *rm_int05;
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extern void *rm_int06;
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extern void *rm_int07;
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extern void *rm_int08;
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extern void *rm_int09;
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extern void *rm_int0a;
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extern void *rm_int0b;
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extern void *rm_int0c;
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extern void *rm_int0d;
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extern void *rm_int0e;
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extern void *rm_int0f;
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extern void *rm_int10;
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extern void *rm_int11;
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extern void *rm_int12;
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extern void *rm_int13;
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extern void *rm_int14;
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extern void *rm_int15;
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extern void *rm_int16;
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extern void *rm_int17;
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extern void *rm_int18;
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extern void *rm_int19;
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extern void *rm_int1a;
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extern void *rm_int1b;
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extern void *rm_int1c;
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extern void *rm_int1d;
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extern void *rm_int1e;
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extern void *rm_int1f;
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extern void *rm_def_int;
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extern void *realmode_reset;
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extern void *realmode_pci_bios_call_entry;
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static int set_jmp_vector(int entry_point, void *target)
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{
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if (entry_point & ~0xffff) {
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return -1;
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}
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if (((u32)target-0xf0000) & ~0xffff) {
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return -1;
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}
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printf("set_jmp_vector: 0xf000:%04x -> %p\n",
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entry_point, target);
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/* jmp opcode */
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writeb(0xea, 0xf0000 + entry_point);
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/* offset */
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writew(((u32)target-0xf0000), 0xf0000 + entry_point + 1);
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/* segment */
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writew(0xf000, 0xf0000 + entry_point + 3);
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return 0;
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}
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/*
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************************************************************
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* Install an interrupt vector
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************************************************************
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*/
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static void setvector(int vector, u16 segment, void *handler)
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{
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u16 *ptr = (u16*)(vector*4);
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ptr[0] = ((u32)handler - (segment << 4))&0xffff;
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ptr[1] = segment;
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#if 0
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printf("setvector: int%02x -> %04x:%04x\n",
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vector, ptr[1], ptr[0]);
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#endif
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}
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#define RELOC_16_LONG(seg, off) *(u32*)(seg << 4 | (u32)&off)
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#define RELOC_16_WORD(seg, off) *(u16*)(seg << 4 | (u32)&off)
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#define RELOC_16_BYTE(seg, off) *(u8*)(seg << 4 | (u32)&off)
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int bios_setup(void)
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{
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ulong bios_start = (ulong)&__bios_start + gd->reloc_off;
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ulong bios_size = (ulong)&__bios_size;
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static int done=0;
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int vector;
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#ifdef CONFIG_PCI
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struct pci_controller *pri_hose;
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#endif
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if (done) {
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return 0;
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}
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done = 1;
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if (bios_size > 65536) {
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printf("BIOS too large (%ld bytes, max is 65536)\n",
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bios_size);
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return -1;
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}
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memcpy(BIOS_BASE, (void*)bios_start, bios_size);
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/* clear bda */
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memset(BIOS_DATA, 0, BIOS_DATA_SIZE);
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/* enter some values to the bda */
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writew(0x3f8, BIOS_DATA); /* com1 addr */
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writew(0x2f8, BIOS_DATA+2); /* com2 addr */
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writew(0x3e8, BIOS_DATA+4); /* com3 addr */
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writew(0x2e8, BIOS_DATA+6); /* com4 addr */
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writew(0x278, BIOS_DATA+8); /* lpt1 addr */
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/*
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* The kernel wants to read the base memory size
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* from 40:13. Put a zero there to avoid an error message
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*/
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writew(0, BIOS_DATA+0x13); /* base memory size */
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/* setup realmode interrupt vectors */
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for (vector = 0; vector < NUMVECTS; vector++) {
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setvector(vector, BIOS_CS, &rm_def_int);
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}
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setvector(0x00, BIOS_CS, &rm_int00);
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setvector(0x01, BIOS_CS, &rm_int01);
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setvector(0x02, BIOS_CS, &rm_int02);
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setvector(0x03, BIOS_CS, &rm_int03);
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setvector(0x04, BIOS_CS, &rm_int04);
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setvector(0x05, BIOS_CS, &rm_int05);
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setvector(0x06, BIOS_CS, &rm_int06);
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setvector(0x07, BIOS_CS, &rm_int07);
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setvector(0x08, BIOS_CS, &rm_int08);
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setvector(0x09, BIOS_CS, &rm_int09);
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setvector(0x0a, BIOS_CS, &rm_int0a);
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setvector(0x0b, BIOS_CS, &rm_int0b);
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setvector(0x0c, BIOS_CS, &rm_int0c);
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setvector(0x0d, BIOS_CS, &rm_int0d);
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setvector(0x0e, BIOS_CS, &rm_int0e);
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setvector(0x0f, BIOS_CS, &rm_int0f);
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setvector(0x10, BIOS_CS, &rm_int10);
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setvector(0x11, BIOS_CS, &rm_int11);
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setvector(0x12, BIOS_CS, &rm_int12);
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setvector(0x13, BIOS_CS, &rm_int13);
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setvector(0x14, BIOS_CS, &rm_int14);
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setvector(0x15, BIOS_CS, &rm_int15);
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setvector(0x16, BIOS_CS, &rm_int16);
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setvector(0x17, BIOS_CS, &rm_int17);
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setvector(0x18, BIOS_CS, &rm_int18);
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setvector(0x19, BIOS_CS, &rm_int19);
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setvector(0x1a, BIOS_CS, &rm_int1a);
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setvector(0x1b, BIOS_CS, &rm_int1b);
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setvector(0x1c, BIOS_CS, &rm_int1c);
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setvector(0x1d, BIOS_CS, &rm_int1d);
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setvector(0x1e, BIOS_CS, &rm_int1e);
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setvector(0x1f, BIOS_CS, &rm_int1f);
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set_jmp_vector(0xfff0, &realmode_reset);
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set_jmp_vector(0xfe6e, &realmode_pci_bios_call_entry);
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/* fill in data area */
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RELOC_16_WORD(0xf000, ram_in_64kb_chunks) = gd->ram_size >> 16;
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RELOC_16_WORD(0xf000, bios_equipment) = 0; /* FixMe */
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/* If we assume only one PCI hose, this PCI hose
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* will own PCI bus #0, and the last PCI bus of
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* that PCI hose will be the last PCI bus in the
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* system.
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* (This, ofcause break on multi hose systems,
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* but our PCI BIOS only support one hose anyway)
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*/
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#ifdef CONFIG_PCI
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pri_hose = pci_bus_to_hose(0);
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if (NULL != pri_hose) {
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/* fill in last pci bus number for use by the realmode
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* PCI BIOS */
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RELOC_16_BYTE(0xf000, pci_last_bus) = pri_hose->last_busno;
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}
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#endif
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return 0;
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}
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