upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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80 lines
1.7 KiB
80 lines
1.7 KiB
/*
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* Copyright 2011-2012 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <asm/processor.h>
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#include <asm/mmu.h>
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#include <asm/cache.h>
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#include <asm/immap_85xx.h>
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#include <asm/io.h>
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#include <miiphy.h>
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#include <libfdt.h>
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#include <fdt_support.h>
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#include <fsl_mdio.h>
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#include <tsec.h>
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#include <jffs2/load_kernel.h>
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#include <mtd_node.h>
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#include <flash.h>
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#include <netdev.h>
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DECLARE_GLOBAL_DATA_PTR;
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int board_early_init_f(void)
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{
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ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
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clrbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_CTS_B0_GPIO42);
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setbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_CTS_B0_DSP_TMS);
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clrbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_RTS_B0_GPIO43);
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setbits_be32(&gur->pmuxcr2, MPC85xx_PMUXCR2_UART_RTS_B0_DSP_TCK |
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MPC85xx_PMUXCR2_UART_CTS_B1_SIM_PD);
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setbits_be32(&gur->halt_req_mask, HALTED_TO_HALT_REQ_MASK_0);
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clrsetbits_be32(&gur->pmuxcr, MPC85xx_PMUXCR_IFC_AD_GPIO_MASK |
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MPC85xx_PMUXCR_IFC_AD17_GPO_MASK,
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MPC85xx_PMUXCR_IFC_AD_GPIO |
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MPC85xx_PMUXCR_IFC_AD17_GPO | MPC85xx_PMUXCR_SDHC_USIM);
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return 0;
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}
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int checkboard(void)
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{
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struct cpu_type *cpu;
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cpu = gd->arch.cpu;
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printf("Board: %sRDB\n", cpu->name);
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return 0;
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}
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#if defined(CONFIG_OF_BOARD_SETUP)
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#ifdef CONFIG_FDT_FIXUP_PARTITIONS
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struct node_info nodes[] = {
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{ "fsl,ifc-nand", MTD_DEV_TYPE_NAND, },
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};
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#endif
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int ft_board_setup(void *blob, bd_t *bd)
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{
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phys_addr_t base;
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phys_size_t size;
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ft_cpu_setup(blob, bd);
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base = getenv_bootm_low();
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size = getenv_bootm_size();
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fdt_fixup_memory(blob, (u64)base, (u64)size);
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#ifdef CONFIG_FDT_FIXUP_PARTITIONS
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fdt_fixup_mtdparts(blob, nodes, ARRAY_SIZE(nodes));
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#endif
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fsl_fdt_fixup_dr_usb(blob, bd);
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return 0;
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}
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#endif
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