upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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101 lines
2.5 KiB
101 lines
2.5 KiB
/*
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* (C) Copyright 2007-2008
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* Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <command.h>
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#include <asm/processor.h>
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#include <asm/io.h>
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#define HWTYPE_CCX16 1
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#define HWREV_300 3
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int board_early_init_f(void)
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{
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mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
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mtdcr(UIC0ER, 0x00000000); /* disable all ints */
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mtdcr(UIC0CR, 0x00000000); /* set all to be non-critical */
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mtdcr(UIC0PR, 0xFFFFFF80); /* set int polarities */
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mtdcr(UIC0TR, 0x10000000); /* set int trigger levels */
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mtdcr(UIC0VCR, 0x00000001); /* set vect base=0,INT0 highest prio */
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mtdcr(UIC0SR, 0xFFFFFFFF); /* clear all ints */
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/*
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* EBC Configuration Register: set ready timeout to 512 ebc-clks
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* -> ca. 15 us
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*/
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mtebc(EBC0_CFG, 0xa8400000); /* ebc always driven */
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return 0;
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}
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/*
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* Check Board Identity:
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*/
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int checkboard(void)
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{
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char *s = getenv("serial#");
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u16 val = in_le16((void *)CONFIG_FPGA_BASE + 2);
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u8 unit_type;
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u8 hardware_cpu_ports;
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u8 hardware_con_ports;
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u8 hardware_version;
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printf("Board: CATCenter Neo");
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if (s != NULL) {
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puts(", serial# ");
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puts(s);
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}
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puts("\n ");
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unit_type = (val & 0xf000) >> 12;
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hardware_cpu_ports = ((val & 0x0f00) >> 8) * 8;
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hardware_con_ports = ((val & 0x00f0) >> 4) * 2;
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hardware_version = val & 0x000f;
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switch (unit_type) {
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case HWTYPE_CCX16:
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printf("CCX16-FPGA (80 UARTs)");
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break;
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default:
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printf("UnitType %d, unsupported", unit_type);
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break;
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}
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printf(", %d cpu ports, %d console ports,",
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hardware_cpu_ports, hardware_con_ports);
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switch (hardware_version) {
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case HWREV_300:
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printf(" HW-Ver 3.00\n");
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break;
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default:
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printf(" HW-Ver %d, unsupported\n",
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hardware_version);
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break;
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}
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return 0;
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}
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