upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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160 lines
5.9 KiB
160 lines
5.9 KiB
/*
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* Copyright (C) 2015-2016 Socionext Inc.
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* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <dm.h>
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#include <dm/pinctrl.h>
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#include "pinctrl-uniphier.h"
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static const struct uniphier_pinctrl_pin uniphier_ld4_pins[] = {
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UNIPHIER_PINCTRL_PIN(53, 0),
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UNIPHIER_PINCTRL_PIN(54, 0),
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UNIPHIER_PINCTRL_PIN(55, 0),
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UNIPHIER_PINCTRL_PIN(56, 0),
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UNIPHIER_PINCTRL_PIN(67, 0),
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UNIPHIER_PINCTRL_PIN(68, 0),
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UNIPHIER_PINCTRL_PIN(69, 0),
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UNIPHIER_PINCTRL_PIN(70, 0),
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UNIPHIER_PINCTRL_PIN(85, 0),
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UNIPHIER_PINCTRL_PIN(88, 0),
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UNIPHIER_PINCTRL_PIN(156, 0),
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};
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static const unsigned emmc_pins[] = {21, 22, 23, 24, 25, 26, 27};
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static const int emmc_muxvals[] = {0, 1, 1, 1, 1, 1, 1};
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static const unsigned emmc_dat8_pins[] = {28, 29, 30, 31};
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static const int emmc_dat8_muxvals[] = {1, 1, 1, 1};
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static const unsigned ether_mii_pins[] = {32, 33, 34, 35, 36, 37, 38, 39, 40,
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41, 42, 43, 136, 137, 138, 139, 140,
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141, 142};
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static const int ether_mii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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4, 4, 4, 4, 4, 4, 4};
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static const unsigned ether_rmii_pins[] = {32, 33, 34, 35, 36, 37, 38, 39, 40,
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41, 42, 43};
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static const int ether_rmii_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
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static const unsigned i2c0_pins[] = {102, 103};
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static const int i2c0_muxvals[] = {0, 0};
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static const unsigned i2c1_pins[] = {104, 105};
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static const int i2c1_muxvals[] = {0, 0};
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static const unsigned i2c2_pins[] = {108, 109};
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static const int i2c2_muxvals[] = {2, 2};
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static const unsigned i2c3_pins[] = {108, 109};
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static const int i2c3_muxvals[] = {3, 3};
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static const unsigned nand_pins[] = {24, 25, 26, 27, 28, 29, 30, 31, 158, 159,
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160, 161, 162, 163, 164};
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static const int nand_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0};
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static const unsigned nand_cs1_pins[] = {22, 23};
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static const int nand_cs1_muxvals[] = {0, 0};
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static const unsigned sd_pins[] = {44, 45, 46, 47, 48, 49, 50, 51, 52};
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static const int sd_muxvals[] = {0, 0, 0, 0, 0, 0, 0, 0, 0};
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static const unsigned system_bus_pins[] = {16, 17, 18, 19, 20, 165, 166, 167,
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168, 169, 170, 171, 172, 173};
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static const int system_bus_muxvals[] = {0, 0, 0, 0, 0, -1, -1, -1, -1, -1, -1,
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-1, -1, -1};
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static const unsigned system_bus_cs0_pins[] = {155};
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static const int system_bus_cs0_muxvals[] = {1};
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static const unsigned system_bus_cs1_pins[] = {174};
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static const int system_bus_cs1_muxvals[] = {-1};
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static const unsigned system_bus_cs2_pins[] = {64};
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static const int system_bus_cs2_muxvals[] = {1};
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static const unsigned system_bus_cs3_pins[] = {156};
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static const int system_bus_cs3_muxvals[] = {1};
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static const unsigned uart0_pins[] = {85, 88};
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static const int uart0_muxvals[] = {1, 1};
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static const unsigned uart1_pins[] = {155, 156};
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static const int uart1_muxvals[] = {13, 13};
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static const unsigned uart1b_pins[] = {69, 70};
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static const int uart1b_muxvals[] = {23, 23};
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static const unsigned uart2_pins[] = {128, 129};
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static const int uart2_muxvals[] = {13, 13};
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static const unsigned uart3_pins[] = {110, 111};
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static const int uart3_muxvals[] = {1, 1};
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static const unsigned usb0_pins[] = {53, 54};
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static const int usb0_muxvals[] = {0, 0};
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static const unsigned usb1_pins[] = {55, 56};
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static const int usb1_muxvals[] = {0, 0};
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static const unsigned usb2_pins[] = {155, 156};
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static const int usb2_muxvals[] = {4, 4};
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static const unsigned usb2b_pins[] = {67, 68};
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static const int usb2b_muxvals[] = {23, 23};
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static const struct uniphier_pinctrl_group uniphier_ld4_groups[] = {
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UNIPHIER_PINCTRL_GROUP_SPL(emmc),
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UNIPHIER_PINCTRL_GROUP_SPL(emmc_dat8),
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UNIPHIER_PINCTRL_GROUP(ether_mii),
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UNIPHIER_PINCTRL_GROUP(ether_rmii),
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UNIPHIER_PINCTRL_GROUP(i2c0),
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UNIPHIER_PINCTRL_GROUP(i2c1),
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UNIPHIER_PINCTRL_GROUP(i2c2),
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UNIPHIER_PINCTRL_GROUP(i2c3),
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UNIPHIER_PINCTRL_GROUP(nand),
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UNIPHIER_PINCTRL_GROUP(nand_cs1),
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UNIPHIER_PINCTRL_GROUP(sd),
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UNIPHIER_PINCTRL_GROUP(system_bus),
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UNIPHIER_PINCTRL_GROUP(system_bus_cs0),
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UNIPHIER_PINCTRL_GROUP(system_bus_cs1),
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UNIPHIER_PINCTRL_GROUP(system_bus_cs2),
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UNIPHIER_PINCTRL_GROUP(system_bus_cs3),
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UNIPHIER_PINCTRL_GROUP_SPL(uart0),
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UNIPHIER_PINCTRL_GROUP_SPL(uart1),
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UNIPHIER_PINCTRL_GROUP_SPL(uart1b),
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UNIPHIER_PINCTRL_GROUP_SPL(uart2),
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UNIPHIER_PINCTRL_GROUP_SPL(uart3),
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UNIPHIER_PINCTRL_GROUP(usb0),
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UNIPHIER_PINCTRL_GROUP(usb1),
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UNIPHIER_PINCTRL_GROUP(usb2),
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UNIPHIER_PINCTRL_GROUP(usb2b),
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};
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static const char * const uniphier_ld4_functions[] = {
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UNIPHIER_PINMUX_FUNCTION_SPL(emmc),
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UNIPHIER_PINMUX_FUNCTION(ether_mii),
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UNIPHIER_PINMUX_FUNCTION(ether_rmii),
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UNIPHIER_PINMUX_FUNCTION(i2c0),
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UNIPHIER_PINMUX_FUNCTION(i2c1),
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UNIPHIER_PINMUX_FUNCTION(i2c2),
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UNIPHIER_PINMUX_FUNCTION(i2c3),
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UNIPHIER_PINMUX_FUNCTION(nand),
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UNIPHIER_PINMUX_FUNCTION(sd),
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UNIPHIER_PINMUX_FUNCTION(system_bus),
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UNIPHIER_PINMUX_FUNCTION_SPL(uart0),
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UNIPHIER_PINMUX_FUNCTION_SPL(uart1),
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UNIPHIER_PINMUX_FUNCTION_SPL(uart2),
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UNIPHIER_PINMUX_FUNCTION_SPL(uart3),
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UNIPHIER_PINMUX_FUNCTION(usb0),
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UNIPHIER_PINMUX_FUNCTION(usb1),
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UNIPHIER_PINMUX_FUNCTION(usb2),
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};
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static struct uniphier_pinctrl_socdata uniphier_ld4_pinctrl_socdata = {
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.pins = uniphier_ld4_pins,
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.pins_count = ARRAY_SIZE(uniphier_ld4_pins),
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.groups = uniphier_ld4_groups,
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.groups_count = ARRAY_SIZE(uniphier_ld4_groups),
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.functions = uniphier_ld4_functions,
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.functions_count = ARRAY_SIZE(uniphier_ld4_functions),
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};
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static int uniphier_ld4_pinctrl_probe(struct udevice *dev)
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{
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return uniphier_pinctrl_probe(dev, &uniphier_ld4_pinctrl_socdata);
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}
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static const struct udevice_id uniphier_ld4_pinctrl_match[] = {
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{ .compatible = "socionext,uniphier-ld4-pinctrl" },
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{ /* sentinel */ }
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};
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U_BOOT_DRIVER(uniphier_ld4_pinctrl) = {
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.name = "uniphier-ld4-pinctrl",
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.id = UCLASS_PINCTRL,
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.of_match = of_match_ptr(uniphier_ld4_pinctrl_match),
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.probe = uniphier_ld4_pinctrl_probe,
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.priv_auto_alloc_size = sizeof(struct uniphier_pinctrl_priv),
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.ops = &uniphier_pinctrl_ops,
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};
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