upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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356 lines
11 KiB
356 lines
11 KiB
/* Configuration header file for Gaisler Research AB's Template
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* design (GPL Open Source SPARC/LEON3 96MHz) for Altera NIOS
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* Development board Stratix II edition, with the FPGA device
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* EP2S60.
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*
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* (C) Copyright 2003-2005
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* (C) Copyright 2008
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* Daniel Hellstrom, Gaisler Research, daniel@gaisler.com.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H__
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#define __CONFIG_H__
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/*
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* High Level Configuration Options
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* (easy to change)
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*/
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#define CONFIG_LEON3 /* This is an LEON3 CPU */
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#define CONFIG_LEON 1 /* This is an LEON CPU */
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/* Altera NIOS Development board, Stratix II board */
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#define CONFIG_GR_EP2S60 1
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/* CPU / AMBA BUS configuration */
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#define CONFIG_SYS_CLK_FREQ 96000000 /* 96MHz */
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/* Number of SPARC register windows */
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#define CFG_SPARC_NWINDOWS 8
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/* Define this is the GR-2S60-MEZZ mezzanine is available and you
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* want to use the USB and GRETH functionality of the board
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*/
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#undef GR_2S60_MEZZ
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#ifdef GR_2S60_MEZZ
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#define USE_GRETH 1
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#define USE_GRUSB 1
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#endif
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/*
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* Serial console configuration
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*/
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#define CONFIG_BAUDRATE 38400 /* ... at 38400 bps */
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#define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
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/* Partitions */
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#define CONFIG_DOS_PARTITION
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#define CONFIG_MAC_PARTITION
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#define CONFIG_ISO_PARTITION
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/*
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* Supported commands
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*/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_REGINFO
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#define CONFIG_CMD_AMBAPP
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_DIAG
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#define CONFIG_CMD_IRQ
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/* USB support */
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#if USE_GRUSB
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#define CONFIG_USB_UHCI
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#define CONFIG_CMD_FAT
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#define CONFIG_CMD_EXT2
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#define CONFIG_CMD_USB
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#define CONFIG_USB_STORAGE
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/* Enable needed helper functions */
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#define CFG_DEVICE_DEREGISTER /* needs device_deregister */
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#endif
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/*
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* Autobooting
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*/
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#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
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#define CONFIG_PREBOOT "echo;" \
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"echo Type \"run flash_nfs\" to mount root filesystem over NFS;" \
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"echo"
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#undef CONFIG_BOOTARGS
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"netdev=eth0\0" \
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"nfsargs=setenv bootargs console=ttyS0,38400 root=/dev/nfs rw " \
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"nfsroot=${serverip}:${rootpath}\0" \
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"ramargs=setenv bootargs console=ttyS0,${baudrate} root=/dev/ram rw\0" \
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"addip=setenv bootargs ${bootargs} " \
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"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
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":${hostname}:${netdev}:off panic=1\0" \
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"flash_nfs=run nfsargs addip;" \
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"bootm ${kernel_addr}\0" \
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"flash_self=run ramargs addip;" \
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"bootm ${kernel_addr} ${ramdisk_addr}\0" \
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"net_nfs=tftp 40000000 ${bootfile};run nfsargs addip;bootm\0" \
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"scratch=40800000\0" \
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"getkernel=tftpboot \$\(scratch\)\ \$\(bootfile\)\0" \
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"bootargs=console=ttyS0,38400 root=/dev/nfs rw nfsroot=192.168.0.20:/export/rootfs ip=192.168.0.207:192.168.0.20:192.168.0.1:255.255.255.0:ml401:eth0\0" \
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""
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#define CONFIG_NETMASK 255.255.255.0
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#define CONFIG_GATEWAYIP 192.168.0.1
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#define CONFIG_SERVERIP 192.168.0.20
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#define CONFIG_IPADDR 192.168.0.207
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#define CONFIG_ROOTPATH /export/rootfs
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#define CONFIG_HOSTNAME ml401
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#define CONFIG_BOOTFILE /uImage
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#define CONFIG_BOOTCOMMAND "run flash_self"
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/* Memory MAP
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*
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* Flash:
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* |--------------------------------|
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* | 0x00000000 Text & Data & BSS | *
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* | for Monitor | *
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* | ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~| *
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* | UNUSED / Growth | * 256kb
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* |--------------------------------|
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* | 0x00050000 Base custom area | *
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* | kernel / FS | *
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* | | * Rest of Flash
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* |~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|
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* | END-0x00008000 Environment | * 32kb
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* |--------------------------------|
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*
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*
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*
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* Main Memory:
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* |--------------------------------|
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* | UNUSED / scratch area |
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* | |
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* | |
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* | |
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* | |
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* |--------------------------------|
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* | Monitor .Text / .DATA / .BSS | * 512kb
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* | Relocated! | *
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* |--------------------------------|
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* | Monitor Malloc | * 128kb (contains relocated environment)
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* |--------------------------------|
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* | Monitor/kernel STACK | * 64kb
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* |--------------------------------|
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* | Page Table for MMU systems | * 2k
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* |--------------------------------|
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* | PROM Code accessed from Linux | * 6kb-128b
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* |--------------------------------|
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* | Global data (avail from kernel)| * 128b
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* |--------------------------------|
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*
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*/
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/*
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* Flash configuration (8,16 or 32 MB)
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* TEXT base always at 0xFFF00000
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* ENV_ADDR always at 0xFFF40000
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* FLASH_BASE at 0xFC000000 for 64 MB
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* 0xFE000000 for 32 MB
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* 0xFF000000 for 16 MB
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* 0xFF800000 for 8 MB
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*/
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/*#define CFG_NO_FLASH 1*/
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#define CFG_FLASH_BASE 0x00000000
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#define CFG_FLASH_SIZE 0x00400000 /* FPGA Bit file is in top of FLASH, we only ues the bottom 4Mb */
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#define PHYS_FLASH_SECT_SIZE 0x00010000 /* 64 KB sectors */
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#define CFG_MAX_FLASH_SECT 256 /* max num of sects on one chip */
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#define CFG_MAX_FLASH_BANKS 1 /* max num of memory banks */
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#define CFG_FLASH_ERASE_TOUT 240000 /* Flash Erase Timeout (in ms) */
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#define CFG_FLASH_WRITE_TOUT 500 /* Flash Write Timeout (in ms) */
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#define CFG_FLASH_LOCK_TOUT 5 /* Timeout for Flash Set Lock Bit (in ms) */
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#define CFG_FLASH_UNLOCK_TOUT 10000 /* Timeout for Flash Clear Lock Bits (in ms) */
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#define CFG_FLASH_PROTECTION /* "Real" (hardware) sectors protection */
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/*** CFI CONFIG ***/
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#define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT
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#define CONFIG_FLASH_CFI_DRIVER
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#define CFG_FLASH_CFI
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/* Bypass cache when reading regs from flash memory */
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#define CFG_FLASH_CFI_BYPASS_READ
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/* Buffered writes (32byte/go) instead of single accesses */
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#define CFG_FLASH_USE_BUFFER_WRITE
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/*
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* Environment settings
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*/
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/*#define CONFIG_ENV_IS_NOWHERE 1*/
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#define CONFIG_ENV_IS_IN_FLASH 1
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/* CONFIG_ENV_ADDR need to be at sector boundary */
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#define CONFIG_ENV_SIZE 0x8000
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#define CONFIG_ENV_SECT_SIZE 0x20000
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#define CONFIG_ENV_ADDR (CFG_FLASH_BASE+CFG_FLASH_SIZE-CONFIG_ENV_SECT_SIZE)
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#define CONFIG_ENV_OVERWRITE 1
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/*
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* Memory map
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*/
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#define CFG_SDRAM_BASE 0x40000000
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#define CFG_SDRAM_SIZE 0x02000000
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#define CFG_SDRAM_END (CFG_SDRAM_BASE+CFG_SDRAM_SIZE)
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/* no SRAM available */
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#undef CFG_SRAM_BASE
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#undef CFG_SRAM_SIZE
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#define CFG_RAM_BASE CFG_SDRAM_BASE
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#define CFG_RAM_SIZE CFG_SDRAM_SIZE
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#define CFG_RAM_END CFG_SDRAM_END
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#define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
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#define CFG_GBL_DATA_OFFSET (CFG_SDRAM_END - CFG_GBL_DATA_SIZE)
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#define CFG_PROM_SIZE (8192-CFG_GBL_DATA_SIZE)
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#define CFG_PROM_OFFSET (CFG_GBL_DATA_OFFSET-CFG_PROM_SIZE)
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#define CFG_INIT_SP_OFFSET (CFG_PROM_OFFSET-32)
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#define CFG_STACK_SIZE (0x10000-32)
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#define CFG_MONITOR_BASE TEXT_BASE
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#if (CFG_MONITOR_BASE < CFG_FLASH_BASE)
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# define CFG_RAMBOOT 1
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#endif
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#define CFG_MONITOR_LEN (512 << 10) /* Reserve 512 kB for Monitor */
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#define CFG_MALLOC_LEN (128 << 10) /* Reserve 128 kB for malloc() */
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#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
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#define CFG_MALLOC_END (CFG_INIT_SP_OFFSET-CFG_STACK_SIZE)
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#define CFG_MALLOC_BASE (CFG_MALLOC_END-CFG_MALLOC_LEN)
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/* relocated monitor area */
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#define CFG_RELOC_MONITOR_MAX_END CFG_MALLOC_BASE
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#define CFG_RELOC_MONITOR_BASE (CFG_RELOC_MONITOR_MAX_END-CFG_MONITOR_LEN)
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/* make un relocated address from relocated address */
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#define UN_RELOC(address) (address-(CFG_RELOC_MONITOR_BASE-TEXT_BASE))
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/*
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* Ethernet configuration uses on board SMC91C111, however if a mezzanine
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* with a PHY is attached the GRETH can be used on this board.
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* Define USE_GRETH in order to use the mezzanine provided PHY with the
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* onchip GRETH network MAC, note that this is not supported by the
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* template design.
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*/
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#ifndef USE_GRETH
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/* USE SMC91C111 MAC */
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#define CONFIG_DRIVER_SMC91111 1
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#define CONFIG_SMC91111_BASE 0x20000300 /* chip select 3 */
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#define CONFIG_SMC_USE_32_BIT 1 /* 32 bit bus */
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#undef CONFIG_SMC_91111_EXT_PHY /* we use internal phy */
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/*#define CONFIG_SHOW_ACTIVITY*/
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#define CONFIG_NET_RETRY_COUNT 10 /* # of retries */
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#else
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/* USE GRETH Ethernet Driver */
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#define CONFIG_NET_MULTI 1
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#define CONFIG_GRETH 1
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/* Default GRETH Ethernet HARDWARE address */
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#define GRETH_HWADDR_0 0x00
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#define GRETH_HWADDR_1 0x00
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#define GRETH_HWADDR_2 0x7a
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#define GRETH_HWADDR_3 0xcc
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#define GRETH_HWADDR_4 0x00
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#define GRETH_HWADDR_5 0x13
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#endif
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#define CONFIG_ETHADDR 00:00:7a:cc:00:13
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#define CONFIG_PHY_ADDR 0x00
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/*
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* Miscellaneous configurable options
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*/
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#define CFG_LONGHELP /* undef to save memory */
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#define CFG_PROMPT "=> " /* Monitor Command Prompt */
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#if defined(CONFIG_CMD_KGDB)
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#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
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#else
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#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
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#endif
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#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
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#define CFG_MAXARGS 16 /* max number of command args */
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#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
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#define CFG_MEMTEST_START 0x00100000 /* memtest works on */
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#define CFG_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
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#define CFG_LOAD_ADDR 0x100000 /* default load address */
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#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks */
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/*-----------------------------------------------------------------------
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* USB stuff
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*-----------------------------------------------------------------------
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*/
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#define CONFIG_USB_CLOCK 0x0001BBBB
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#define CONFIG_USB_CONFIG 0x00005000
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/***** Gaisler GRLIB IP-Cores Config ********/
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/* AMBA Plug & Play info display on startup */
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/*#define CFG_AMBAPP_PRINT_ON_STARTUP*/
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#define CFG_GRLIB_SDRAM 0
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/* See, GRLIB Docs (grip.pdf) on how to set up
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* These the memory controller registers.
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*/
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#define CFG_GRLIB_MEMCFG1 (0x10f800ff | (1<<11))
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#define CFG_GRLIB_MEMCFG2 0x00000000
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#define CFG_GRLIB_MEMCFG3 0x00000000
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#define CFG_GRLIB_FT_MEMCFG1 (0x10f800ff | (1<<11))
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#define CFG_GRLIB_FT_MEMCFG2 0x00000000
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#define CFG_GRLIB_FT_MEMCFG3 0x00000000
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#define CFG_GRLIB_DDR_CFG 0xa900830a
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#define CFG_GRLIB_DDR2_CFG1 0x00000000
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#define CFG_GRLIB_DDR2_CFG3 0x00000000
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/* Calculate scaler register value from default baudrate */
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#define CFG_GRLIB_APBUART_SCALER \
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((((CONFIG_SYS_CLK_FREQ*10)/(CONFIG_BAUDRATE*8))-5)/10)
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/* Identification string */
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#define CONFIG_IDENT_STRING "GAISLER LEON3 EP2S60"
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/* default kernel command line */
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#define CONFIG_DEFAULT_KERNEL_COMMAND_LINE "console=ttyS0,38400\0\0"
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#endif /* __CONFIG_H */
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