upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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454 lines
11 KiB
454 lines
11 KiB
/*
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* Board functions for Siemens TAURUS (AT91SAM9G20) based boards
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* (C) Copyright Siemens AG
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*
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* Based on:
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* U-Boot file: board/atmel/at91sam9260ek/at91sam9260ek.c
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*
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* (C) Copyright 2007-2008
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* Stelian Pop <stelian@popies.net>
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* Lead Tech Design <www.leadtechdesign.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <command.h>
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#include <common.h>
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#include <dm.h>
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#include <environment.h>
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#include <asm/io.h>
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#include <asm/arch/at91sam9260_matrix.h>
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#include <asm/arch/at91sam9_smc.h>
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#include <asm/arch/at91_common.h>
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#include <asm/arch/at91_rstc.h>
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#include <asm/arch/gpio.h>
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#include <asm/arch/at91sam9_sdramc.h>
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#include <asm/arch/atmel_serial.h>
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#include <asm/arch/clk.h>
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#include <asm/gpio.h>
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#include <linux/mtd/rawnand.h>
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#include <atmel_mci.h>
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#include <asm/arch/at91_spi.h>
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#include <spi.h>
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#include <net.h>
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#ifndef CONFIG_DM_ETH
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#include <netdev.h>
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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static void taurus_request_gpio(void)
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{
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gpio_request(CONFIG_SYS_NAND_ENABLE_PIN, "nand ena");
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gpio_request(CONFIG_SYS_NAND_READY_PIN, "nand rdy");
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gpio_request(AT91_PIN_PA25, "ena PHY");
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}
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static void taurus_nand_hw_init(void)
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{
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struct at91_smc *smc = (struct at91_smc *)ATMEL_BASE_SMC;
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struct at91_matrix *matrix = (struct at91_matrix *)ATMEL_BASE_MATRIX;
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unsigned long csa;
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/* Assign CS3 to NAND/SmartMedia Interface */
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csa = readl(&matrix->ebicsa);
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csa |= AT91_MATRIX_CS3A_SMC_SMARTMEDIA;
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writel(csa, &matrix->ebicsa);
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/* Configure SMC CS3 for NAND/SmartMedia */
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writel(AT91_SMC_SETUP_NWE(2) | AT91_SMC_SETUP_NCS_WR(0) |
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AT91_SMC_SETUP_NRD(2) | AT91_SMC_SETUP_NCS_RD(0),
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&smc->cs[3].setup);
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writel(AT91_SMC_PULSE_NWE(4) | AT91_SMC_PULSE_NCS_WR(3) |
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AT91_SMC_PULSE_NRD(4) | AT91_SMC_PULSE_NCS_RD(3),
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&smc->cs[3].pulse);
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writel(AT91_SMC_CYCLE_NWE(7) | AT91_SMC_CYCLE_NRD(7),
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&smc->cs[3].cycle);
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writel(AT91_SMC_MODE_RM_NRD | AT91_SMC_MODE_WM_NWE |
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AT91_SMC_MODE_EXNW_DISABLE |
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AT91_SMC_MODE_DBW_8 |
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AT91_SMC_MODE_TDF_CYCLE(3),
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&smc->cs[3].mode);
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/* Configure RDY/BSY */
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at91_set_gpio_input(CONFIG_SYS_NAND_READY_PIN, 1);
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/* Enable NandFlash */
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at91_set_gpio_output(CONFIG_SYS_NAND_ENABLE_PIN, 1);
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}
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#if defined(CONFIG_SPL_BUILD)
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#include <spl.h>
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#include <nand.h>
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#include <spi_flash.h>
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void matrix_init(void)
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{
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struct at91_matrix *mat = (struct at91_matrix *)ATMEL_BASE_MATRIX;
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writel((readl(&mat->scfg[3]) & (~AT91_MATRIX_SLOT_CYCLE))
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| AT91_MATRIX_SLOT_CYCLE_(0x40),
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&mat->scfg[3]);
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}
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#if defined(CONFIG_BOARD_AXM)
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static int at91_is_recovery(void)
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{
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if ((at91_get_gpio_value(AT91_PIN_PA26) == 0) &&
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(at91_get_gpio_value(AT91_PIN_PA27) == 0))
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return 1;
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return 0;
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}
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#elif defined(CONFIG_BOARD_TAURUS)
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static int at91_is_recovery(void)
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{
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if (at91_get_gpio_value(AT91_PIN_PA31) == 0)
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return 1;
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return 0;
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}
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#endif
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void spl_board_init(void)
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{
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taurus_nand_hw_init();
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at91_spi0_hw_init(TAURUS_SPI_MASK);
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#if defined(CONFIG_BOARD_AXM)
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/* Configure LED PINs */
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at91_set_gpio_output(AT91_PIN_PA6, 0);
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at91_set_gpio_output(AT91_PIN_PA8, 0);
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at91_set_gpio_output(AT91_PIN_PA9, 0);
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at91_set_gpio_output(AT91_PIN_PA10, 0);
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at91_set_gpio_output(AT91_PIN_PA11, 0);
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at91_set_gpio_output(AT91_PIN_PA12, 0);
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/* Configure recovery button PINs */
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at91_set_gpio_input(AT91_PIN_PA26, 1);
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at91_set_gpio_input(AT91_PIN_PA27, 1);
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#elif defined(CONFIG_BOARD_TAURUS)
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at91_set_gpio_input(AT91_PIN_PA31, 1);
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#endif
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/* check for recovery mode */
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if (at91_is_recovery() == 1) {
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struct spi_flash *flash;
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puts("Recovery button pressed\n");
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nand_init();
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spl_nand_erase_one(0, 0);
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flash = spi_flash_probe(CONFIG_SF_DEFAULT_BUS,
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0,
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CONFIG_SF_DEFAULT_SPEED,
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CONFIG_SF_DEFAULT_MODE);
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if (!flash) {
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puts("no flash\n");
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} else {
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puts("erase spi flash sector 0\n");
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spi_flash_erase(flash, 0,
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CONFIG_SYS_NAND_U_BOOT_SIZE);
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}
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}
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}
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#define SDRAM_BASE_CONF (AT91_SDRAMC_NR_13 | AT91_SDRAMC_CAS_3 \
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|AT91_SDRAMC_NB_4 | AT91_SDRAMC_DBW_32 \
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| AT91_SDRAMC_TWR_VAL(3) | AT91_SDRAMC_TRC_VAL(9) \
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| AT91_SDRAMC_TRP_VAL(3) | AT91_SDRAMC_TRCD_VAL(3) \
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| AT91_SDRAMC_TRAS_VAL(6) | AT91_SDRAMC_TXSR_VAL(10))
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void sdramc_configure(unsigned int mask)
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{
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struct at91_matrix *ma = (struct at91_matrix *)ATMEL_BASE_MATRIX;
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struct sdramc_reg setting;
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at91_sdram_hw_init();
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setting.cr = SDRAM_BASE_CONF | mask;
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setting.mdr = AT91_SDRAMC_MD_SDRAM;
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setting.tr = (CONFIG_SYS_MASTER_CLOCK * 7) / 1000000;
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writel(readl(&ma->ebicsa) | AT91_MATRIX_CS1A_SDRAMC |
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AT91_MATRIX_VDDIOMSEL_3_3V | AT91_MATRIX_EBI_IOSR_SEL,
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&ma->ebicsa);
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sdramc_initialize(ATMEL_BASE_CS1, &setting);
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}
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void mem_init(void)
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{
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unsigned int ram_size = 0;
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/* Configure SDRAM for 128MB */
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sdramc_configure(AT91_SDRAMC_NC_10);
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/* Do memtest for 128MB */
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ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
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CONFIG_SYS_SDRAM_SIZE);
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/*
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* If 32MB or 16MB should be supported check also for
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* expected mirroring at A16 and A17
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* To find mirror addresses depends how the collumns are connected
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* at RAM (internaly or externaly)
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* If the collumns are not in inverted order the mirror size effect
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* behaves like normal SRAM with A0,A1,A2,etc. connected incremantal
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*/
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/* Mirrors at A15 on ATMEL G20 SDRAM Controller with 64MB*/
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if (ram_size == 0x800) {
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printf("\n\r 64MB");
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sdramc_configure(AT91_SDRAMC_NC_9);
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} else {
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/* Size already initialized */
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printf("\n\r 128MB");
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}
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}
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#endif
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#ifdef CONFIG_MACB
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static void siemens_phy_reset(void)
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{
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/*
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* we need to reset PHY for 200us
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* because of bug in ATMEL G20 CPU (undefined initial state of GPIO)
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*/
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if ((readl(AT91_ASM_RSTC_SR) & AT91_RSTC_RSTTYP) ==
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AT91_RSTC_RSTTYP_GENERAL)
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at91_set_gpio_value(AT91_PIN_PA25, 0); /* reset eth switch */
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}
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static void taurus_macb_hw_init(void)
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{
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/* Enable EMAC clock */
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at91_periph_clk_enable(ATMEL_ID_EMAC0);
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/*
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* Disable pull-up on:
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* RXDV (PA17) => PHY normal mode (not Test mode)
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* ERX0 (PA14) => PHY ADDR0
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* ERX1 (PA15) => PHY ADDR1
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* ERX2 (PA25) => PHY ADDR2
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* ERX3 (PA26) => PHY ADDR3
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* ECRS (PA28) => PHY ADDR4 => PHYADDR = 0x0
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*
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* PHY has internal pull-down
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*/
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at91_set_pio_pullup(AT91_PIO_PORTA, 14, 0);
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at91_set_pio_pullup(AT91_PIO_PORTA, 15, 0);
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at91_set_pio_pullup(AT91_PIO_PORTA, 17, 0);
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at91_set_pio_pullup(AT91_PIO_PORTA, 25, 0);
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at91_set_pio_pullup(AT91_PIO_PORTA, 26, 0);
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at91_set_pio_pullup(AT91_PIO_PORTA, 28, 0);
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siemens_phy_reset();
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at91_phy_reset();
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at91_set_gpio_input(AT91_PIN_PA25, 1); /* ERST tri-state */
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/* Re-enable pull-up */
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at91_set_pio_pullup(AT91_PIO_PORTA, 14, 1);
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at91_set_pio_pullup(AT91_PIO_PORTA, 15, 1);
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at91_set_pio_pullup(AT91_PIO_PORTA, 17, 1);
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at91_set_pio_pullup(AT91_PIO_PORTA, 25, 1);
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at91_set_pio_pullup(AT91_PIO_PORTA, 26, 1);
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at91_set_pio_pullup(AT91_PIO_PORTA, 28, 1);
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/* Initialize EMAC=MACB hardware */
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at91_macb_hw_init();
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}
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#endif
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#ifdef CONFIG_GENERIC_ATMEL_MCI
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int board_mmc_init(bd_t *bd)
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{
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at91_mci_hw_init();
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return atmel_mci_init((void *)ATMEL_BASE_MCI);
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}
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#endif
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int board_early_init_f(void)
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{
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/* Enable clocks for all PIOs */
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at91_periph_clk_enable(ATMEL_ID_PIOA);
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at91_periph_clk_enable(ATMEL_ID_PIOB);
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at91_periph_clk_enable(ATMEL_ID_PIOC);
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at91_seriald_hw_init();
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taurus_request_gpio();
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return 0;
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}
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/* FIXME gpio code here need to handle through DM_GPIO */
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#ifndef CONFIG_DM_SPI
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int spi_cs_is_valid(unsigned int bus, unsigned int cs)
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{
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return bus == 0 && cs == 0;
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}
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void spi_cs_activate(struct spi_slave *slave)
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{
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at91_set_gpio_value(TAURUS_SPI_CS_PIN, 0);
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}
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void spi_cs_deactivate(struct spi_slave *slave)
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{
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at91_set_gpio_value(TAURUS_SPI_CS_PIN, 1);
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}
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#endif
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#ifdef CONFIG_USB_GADGET_AT91
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#include <linux/usb/at91_udc.h>
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void at91_udp_hw_init(void)
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{
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/* Enable PLLB */
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at91_pllb_clk_enable(get_pllb_init());
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/* Enable UDPCK clock, MCK is enabled in at91_clock_init() */
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at91_periph_clk_enable(ATMEL_ID_UDP);
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at91_system_clk_enable(AT91SAM926x_PMC_UDP);
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}
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struct at91_udc_data board_udc_data = {
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.baseaddr = ATMEL_BASE_UDP0,
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};
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#endif
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int board_init(void)
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{
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/* adress of boot parameters */
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gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
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taurus_request_gpio();
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#ifdef CONFIG_CMD_NAND
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taurus_nand_hw_init();
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#endif
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#ifdef CONFIG_MACB
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taurus_macb_hw_init();
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#endif
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at91_spi0_hw_init(TAURUS_SPI_MASK);
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#ifdef CONFIG_USB_GADGET_AT91
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at91_udp_hw_init();
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at91_udc_probe(&board_udc_data);
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#endif
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return 0;
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}
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int dram_init(void)
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{
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gd->ram_size = get_ram_size((void *)CONFIG_SYS_SDRAM_BASE,
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CONFIG_SYS_SDRAM_SIZE);
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return 0;
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}
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#ifndef CONFIG_DM_ETH
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int board_eth_init(bd_t *bis)
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{
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int rc = 0;
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#ifdef CONFIG_MACB
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rc = macb_eth_initialize(0, (void *)ATMEL_BASE_EMAC0, 0x00);
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#endif
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return rc;
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}
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#endif
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#if !defined(CONFIG_SPL_BUILD)
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#if defined(CONFIG_BOARD_AXM)
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/*
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* Booting the Fallback Image.
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*
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* The function is used to provide and
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* boot the image with the fallback
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* parameters, incase if the faulty image
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* in upgraded over the base firmware.
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*
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*/
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static int upgrade_failure_fallback(void)
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{
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char *partitionset_active = NULL;
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char *rootfs = NULL;
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char *rootfs_fallback = NULL;
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char *kern_off;
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char *kern_off_fb;
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char *kern_size;
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char *kern_size_fb;
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partitionset_active = env_get("partitionset_active");
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if (partitionset_active) {
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if (partitionset_active[0] == 'A')
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env_set("partitionset_active", "B");
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else
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env_set("partitionset_active", "A");
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} else {
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printf("partitionset_active missing.\n");
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return -ENOENT;
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}
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rootfs = env_get("rootfs");
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rootfs_fallback = env_get("rootfs_fallback");
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env_set("rootfs", rootfs_fallback);
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env_set("rootfs_fallback", rootfs);
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kern_size = env_get("kernel_size");
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kern_size_fb = env_get("kernel_size_fallback");
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env_set("kernel_size", kern_size_fb);
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env_set("kernel_size_fallback", kern_size);
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kern_off = env_get("kernel_Off");
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kern_off_fb = env_get("kernel_Off_fallback");
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env_set("kernel_Off", kern_off_fb);
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env_set("kernel_Off_fallback", kern_off);
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env_set("bootargs", '\0');
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env_set("upgrade_available", '\0');
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env_set("boot_retries", '\0');
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env_save();
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return 0;
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}
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static int do_upgrade_available(cmd_tbl_t *cmdtp, int flag, int argc,
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char * const argv[])
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{
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unsigned long upgrade_available = 0;
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unsigned long boot_retry = 0;
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char boot_buf[10];
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upgrade_available = simple_strtoul(env_get("upgrade_available"), NULL,
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10);
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if (upgrade_available) {
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boot_retry = simple_strtoul(env_get("boot_retries"), NULL, 10);
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boot_retry++;
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sprintf(boot_buf, "%lx", boot_retry);
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env_set("boot_retries", boot_buf);
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env_save();
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/*
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* Here the boot_retries count is checked, and if the
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* count becomes greater than 2 switch back to the
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* fallback, and reset the board.
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*/
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if (boot_retry > 2) {
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if (upgrade_failure_fallback() == 0)
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do_reset(NULL, 0, 0, NULL);
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return -1;
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}
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}
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return 0;
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}
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U_BOOT_CMD(
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upgrade_available, 1, 1, do_upgrade_available,
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"check Siemens update",
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"no parameters"
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);
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#endif
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#endif
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