upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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86 lines
2.3 KiB
86 lines
2.3 KiB
/*
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* Copyright (c) 2004 Cucy Systems (http://www.cucy.com)
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* Curt Brune <curt@cucy.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/hardware.h>
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#include <command.h>
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/* ------------------------------------------------------------------------- */
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#define PUT_LED(val) (PUT_REG(REG_IOPDATA, (~val)&0xFF))
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#define GET_LED() ((~GET_REG( REG_IOPDATA)) & 0xFF)
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#define SET_LED(val) { u32 led = GET_LED(); led |= 1 << (val); PUT_LED( led); }
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#define CLR_LED(val) { u32 led = GET_LED(); led &= ~(1 << (val)); PUT_LED( led); }
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/*
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* Miscelaneous platform dependent initialisations
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*/
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int board_init (void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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icache_enable();
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/* address for the kernel command line */
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gd->bd->bi_boot_params = 0x800;
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/* enable board LEDs for output */
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PUT_REG( REG_IOPDATA, 0x0);
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PUT_REG( REG_IOPMODE, 0xFFFF);
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PUT_REG( REG_IOPDATA, 0xFF);
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/* enable LED 7 to show we're alive */
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SET_LED( 7);
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/* configure free running timer 1 */
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/* Stop timer 1 */
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CLR_REG( REG_TMOD, TM1_RUN);
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/* Configure for toggle mode */
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SET_REG( REG_TMOD, TM1_TOGGLE);
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/* Load Timer data register with count down value */
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PUT_REG( REG_TDATA1, 0xFFFFFFFF);
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/* Clear timer counter register */
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PUT_REG( REG_TCNT1, 0x0);
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/* Start timer -- count down timer */
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SET_REG( REG_TMOD, TM1_RUN);
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return 0;
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}
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int dram_init (void)
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{
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DECLARE_GLOBAL_DATA_PTR;
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gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
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gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
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#if CONFIG_NR_DRAM_BANKS == 2
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gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
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gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
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#endif
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return 0;
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}
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