upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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102 lines
3.0 KiB
102 lines
3.0 KiB
/*
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* (C) Copyright 2007
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* Sascha Hauer, Pengutronix
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <asm/arch/mx31-regs.h>
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#define TIMER_BASE 0x53f90000 /* General purpose timer 1 */
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/* General purpose timers registers */
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#define GPTCR __REG(TIMER_BASE) /* Control register */
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#define GPTPR __REG(TIMER_BASE + 0x4) /* Prescaler register */
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#define GPTSR __REG(TIMER_BASE + 0x8) /* Status register */
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#define GPTCNT __REG(TIMER_BASE + 0x24) /* Counter register */
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/* General purpose timers bitfields */
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#define GPTCR_SWR (1<<15) /* Software reset */
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#define GPTCR_FRR (1<<9) /* Freerun / restart */
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#define GPTCR_CLKSOURCE_32 (4<<6) /* Clock source */
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#define GPTCR_TEN (1) /* Timer enable */
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/* nothing really to do with interrupts, just starts up a counter. */
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int interrupt_init (void)
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{
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int i;
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/* setup GP Timer 1 */
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GPTCR = GPTCR_SWR;
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for ( i=0; i<100; i++) GPTCR = 0; /* We have no udelay by now */
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GPTPR = 0; /* 32Khz */
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GPTCR |= GPTCR_CLKSOURCE_32 | GPTCR_TEN; /* Freerun Mode, PERCLK1 input */
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return 0;
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}
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void reset_timer_masked (void)
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{
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GPTCR = 0;
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GPTCR = GPTCR_CLKSOURCE_32 | GPTCR_TEN; /* Freerun Mode, PERCLK1 input */
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}
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ulong get_timer_masked (void)
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{
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ulong val = GPTCNT;
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return val;
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}
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ulong get_timer (ulong base)
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{
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return get_timer_masked () - base;
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}
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void set_timer (ulong t)
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{
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}
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/* delay x useconds AND perserve advance timstamp value */
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void udelay (unsigned long usec)
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{
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ulong tmo, tmp;
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if (usec >= 1000) { /* if "big" number, spread normalization to seconds */
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tmo = usec / 1000; /* start to normalize for usec to ticks per sec */
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tmo *= CFG_HZ; /* find number of "ticks" to wait to achieve target */
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tmo /= 1000; /* finish normalize. */
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} else { /* else small number, don't kill it prior to HZ multiply */
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tmo = usec * CFG_HZ;
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tmo /= (1000*1000);
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}
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tmp = get_timer (0); /* get current timestamp */
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if ( (tmo + tmp + 1) < tmp )/* if setting this forward will roll time stamp */
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reset_timer_masked (); /* reset "advancing" timestamp to 0, set lastinc value */
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else
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tmo += tmp; /* else, set advancing stamp wake up time */
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while (get_timer_masked () < tmo)/* loop till event */
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/*NOP*/;
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}
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void reset_cpu (ulong addr)
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{
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__REG16(WDOG_BASE) = 4;
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}
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