upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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289 lines
7.8 KiB
289 lines
7.8 KiB
/*
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* Copyright (C) 2016 Timesys Corporation
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* Copyright (C) 2016 Advantech Corporation
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* Copyright (C) 2012 Freescale Semiconductor, Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __ADVANTECH_DMSBA16_CONFIG_H
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#define __ADVANTECH_DMSBA16_CONFIG_H
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#include <asm/arch/imx-regs.h>
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#include <asm/imx-common/gpio.h>
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#define CONFIG_BOARD_NAME "Advantech DMS-BA16"
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#define CONFIG_MXC_UART_BASE UART4_BASE
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#define CONSOLE_DEV "ttymxc3"
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#define CONFIG_EXTRA_BOOTARGS "panic=10"
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#define CONFIG_BOOT_DIR ""
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#define CONFIG_LOADCMD "fatload"
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#define CONFIG_RFSPART "2"
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#define CONFIG_SUPPORT_EMMC_BOOT
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#include "mx6_common.h"
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#include <linux/sizes.h>
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_REVISION_TAG
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#define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M)
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#define CONFIG_MXC_GPIO
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_OCOTP
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/* SATA Configs */
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#define CONFIG_DWC_AHSATA
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#define CONFIG_SYS_SATA_MAX_DEVICE 1
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#define CONFIG_DWC_AHSATA_PORT_ID 0
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#define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR
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#define CONFIG_LBA48
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#define CONFIG_LIBATA
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/* MMC Configs */
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#define CONFIG_FSL_ESDHC
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#define CONFIG_FSL_USDHC
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_BOUNCE_BUFFER
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/* USB Configs */
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#define CONFIG_USB_STORAGE
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
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#define CONFIG_USBD_HS
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#define CONFIG_USB_FUNCTION_MASS_STORAGE
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#define CONFIG_USB_GADGET_VBUS_DRAW 2
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/* Networking Configs */
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#define CONFIG_FEC_MXC
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#define CONFIG_MII
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#define IMX_FEC_BASE ENET_BASE_ADDR
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#define CONFIG_FEC_XCV_TYPE RGMII
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#define CONFIG_ETHPRIME "FEC"
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#define CONFIG_FEC_MXC_PHYADDR 4
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#define CONFIG_PHYLIB
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#define CONFIG_PHY_ATHEROS
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/* Serial Flash */
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#ifdef CONFIG_CMD_SF
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#define CONFIG_MXC_SPI
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#define CONFIG_SF_DEFAULT_BUS 0
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#define CONFIG_SF_DEFAULT_CS 0
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#define CONFIG_SF_DEFAULT_SPEED 20000000
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#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
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#endif
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_LOADADDR 0x12000000
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#define CONFIG_SYS_TEXT_BASE 0x17800000
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"script=boot.scr\0" \
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"image=" CONFIG_BOOT_DIR "/uImage\0" \
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"uboot=u-boot.imx\0" \
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"fdt_file=" CONFIG_BOOT_DIR "/" CONFIG_DEFAULT_FDT_FILE "\0" \
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"fdt_addr=0x18000000\0" \
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"boot_fdt=yes\0" \
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"ip_dyn=yes\0" \
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"console=" CONSOLE_DEV "\0" \
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"fdt_high=0xffffffff\0" \
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"initrd_high=0xffffffff\0" \
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"sddev=0\0" \
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"emmcdev=1\0" \
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"partnum=1\0" \
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"loadcmd=" CONFIG_LOADCMD "\0" \
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"rfspart=" CONFIG_RFSPART "\0" \
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"update_sd_firmware=" \
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"if test ${ip_dyn} = yes; then " \
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"setenv get_cmd dhcp; " \
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"else " \
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"setenv get_cmd tftp; " \
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"fi; " \
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"if mmc dev ${mmcdev}; then " \
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"if ${get_cmd} ${update_sd_firmware_filename}; then " \
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"setexpr fw_sz ${filesize} / 0x200; " \
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"setexpr fw_sz ${fw_sz} + 1; " \
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"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
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"fi; " \
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"fi\0" \
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"update_sf_uboot=" \
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"if tftp $loadaddr $uboot; then " \
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"sf probe; " \
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"sf erase 0 0xC0000; " \
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"sf write $loadaddr 0x400 $filesize; " \
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"echo 'U-Boot upgraded. Please reset'; " \
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"fi\0" \
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"setargs=setenv bootargs console=${console},${baudrate} " \
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"root=/dev/${rootdev} rw rootwait " CONFIG_EXTRA_BOOTARGS "\0" \
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"loadbootscript=" \
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"${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" \
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"bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \
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" source\0" \
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"loadimage=" \
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"${loadcmd} ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
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"loadfdt=${loadcmd} ${dev} ${devnum}:${partnum} ${fdt_addr} ${fdt_file}\0" \
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"tryboot=" \
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"if run loadbootscript; then " \
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"run bootscript; " \
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"else " \
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"if run loadimage; then " \
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"run doboot; " \
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"fi; " \
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"fi;\0" \
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"doboot=echo Booting from ${dev}:${devnum}:${partnum} ...; " \
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"run setargs; " \
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"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
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"if run loadfdt; then " \
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"bootm ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"if test ${boot_fdt} = try; then " \
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"bootm; " \
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"else " \
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"echo WARN: Cannot load the DT; " \
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"fi; " \
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"fi; " \
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"else " \
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"bootm; " \
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"fi;\0" \
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"netargs=setenv bootargs console=${console},${baudrate} " \
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"root=/dev/nfs " \
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"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
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"netboot=echo Booting from net ...; " \
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"run netargs; " \
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"if test ${ip_dyn} = yes; then " \
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"setenv get_cmd dhcp; " \
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"else " \
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"setenv get_cmd tftp; " \
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"fi; " \
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"${get_cmd} ${image}; " \
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"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
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"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
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"bootm ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"if test ${boot_fdt} = try; then " \
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"bootm; " \
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"else " \
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"echo WARN: Cannot load the DT; " \
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"fi; " \
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"fi; " \
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"else " \
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"bootm; " \
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"fi;\0" \
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#define CONFIG_BOOTCOMMAND \
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"usb start; " \
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"setenv dev usb; " \
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"setenv devnum 0; " \
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"setenv rootdev sda${rfspart}; " \
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"run tryboot; " \
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\
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"setenv dev mmc; " \
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"setenv rootdev mmcblk0p${rfspart}; " \
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\
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"setenv devnum ${sddev}; " \
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"if mmc dev ${devnum}; then " \
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"run tryboot; " \
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"fi; " \
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\
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"setenv devnum ${emmcdev}; " \
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"setenv rootdev mmcblk${emmcdev}p${rfspart}; " \
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"if mmc dev ${devnum}; then " \
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"run tryboot; " \
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"fi; " \
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\
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"bmode usb; " \
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#define CONFIG_ARP_TIMEOUT 200UL
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_AUTO_COMPLETE
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_SYS_MEMTEST_START 0x10000000
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#define CONFIG_SYS_MEMTEST_END 0x10010000
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#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#define CONFIG_CMDLINE_EDITING
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/* Physical Memory Map */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/* FLASH and environment organization */
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#define CONFIG_ENV_IS_IN_SPI_FLASH
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#define CONFIG_ENV_SIZE (8 * 1024)
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#define CONFIG_ENV_OFFSET (768 * 1024)
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#define CONFIG_ENV_SECT_SIZE (64 * 1024)
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#define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS
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#define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS
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#define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE
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#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
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#ifndef CONFIG_SYS_DCACHE_OFF
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#endif
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#define CONFIG_SYS_FSL_USDHC_NUM 3
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/* Framebuffer */
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#ifdef CONFIG_VIDEO
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#define CONFIG_VIDEO_IPUV3
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#define CONFIG_VIDEO_BMP_RLE8
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#define CONFIG_SPLASH_SCREEN
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#define CONFIG_SPLASH_SCREEN_ALIGN
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#define CONFIG_BMP_16BPP
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#define CONFIG_VIDEO_LOGO
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#define CONFIG_VIDEO_BMP_LOGO
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#define CONFIG_IPUV3_CLK 260000000
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#define CONFIG_IMX_HDMI
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#define CONFIG_IMX_VIDEO_SKIP
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#endif
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#define CONFIG_PWM_IMX
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#define CONFIG_IMX6_PWM_PER_CLK 66000000
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#undef CONFIG_CMD_PCI
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#ifdef CONFIG_CMD_PCI
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#define CONFIG_PCI_SCAN_SHOW
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#define CONFIG_PCIE_IMX
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#define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12)
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#define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(1, 5)
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#endif
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/* I2C Configs */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_SYS_I2C_MXC_I2C1
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#define CONFIG_SYS_I2C_MXC_I2C2
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#define CONFIG_SYS_I2C_MXC_I2C3
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#endif /* __ADVANTECH_DMSBA16_CONFIG_H */
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