upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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61 lines
1.3 KiB
61 lines
1.3 KiB
/*
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* (C) Copyright 2009
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* Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <miiphy.h>
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#include <netdev.h>
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#include <nand.h>
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#include <asm/io.h>
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#include <linux/mtd/fsmc_nand.h>
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#include <asm/mach-types.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/spr_defs.h>
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#include <asm/arch/spr_misc.h>
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static struct nand_chip nand_chip[CONFIG_SYS_MAX_NAND_DEVICE];
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int board_init(void)
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{
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return spear_board_init(MACH_TYPE_SPEAR300);
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}
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/*
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* board_nand_init - Board specific NAND initialization
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* @nand: mtd private chip structure
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*
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* Called by nand_init_chip to initialize the board specific functions
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*/
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void board_nand_init()
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{
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struct misc_regs *const misc_regs_p =
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(struct misc_regs *)CONFIG_SPEAR_MISCBASE;
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struct nand_chip *nand = &nand_chip[0];
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#if defined(CONFIG_NAND_FSMC)
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if (((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
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MISC_SOCCFG30) ||
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((readl(&misc_regs_p->auto_cfg_reg) & MISC_SOCCFGMSK) ==
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MISC_SOCCFG31)) {
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fsmc_nand_init(nand);
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}
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#endif
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return;
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}
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int board_eth_init(bd_t *bis)
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{
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int ret = 0;
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#if defined(CONFIG_ETH_DESIGNWARE)
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u32 interface = PHY_INTERFACE_MODE_MII;
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if (designware_initialize(CONFIG_SPEAR_ETHBASE, interface) >= 0)
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ret++;
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#endif
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return ret;
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}
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