upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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293 lines
8.2 KiB
293 lines
8.2 KiB
/*
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* Copyright (C) 2008 Texas Instruments, Inc <www.ti.com>
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*
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* Based on davinci_dvevm.h. Original Copyrights follow:
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*
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* Copyright (C) 2007 Sergey Kubushyn <ksi@koi8.net>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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/*
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* Board
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*/
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#define CONFIG_DRIVER_TI_EMAC
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#define CONFIG_USE_SPIFLASH
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/*
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* SoC Configuration
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*/
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#define CONFIG_MACH_DAVINCI_DA830_EVM
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#define CONFIG_SOC_DA8XX /* TI DA8xx SoC */
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#define CONFIG_SOC_DA830 /* TI DA830 SoC */
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#define CONFIG_SYS_CLK_FREQ clk_get(DAVINCI_ARM_CLKID)
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#define CONFIG_SYS_OSCIN_FREQ 24000000
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#define CONFIG_SYS_TIMERBASE DAVINCI_TIMER0_BASE
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#define CONFIG_SYS_HZ_CLOCK clk_get(DAVINCI_AUXCLK_CLKID)
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#define CONFIG_SKIP_LOWLEVEL_INIT
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#define CONFIG_SYS_TEXT_BASE 0xc1080000
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/*
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* Memory Info
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*/
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#define CONFIG_SYS_MALLOC_LEN (0x10000 + 1*1024*1024) /* malloc() len */
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#define PHYS_SDRAM_1 0xc0000000 /* SDRAM Start */
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#define CONFIG_SYS_MEMTEST_START (PHYS_SDRAM_1 + 0x2000000)
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
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(32 << 20))
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#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
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/*
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* Serial Driver info
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*/
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#define CONFIG_SYS_NS16550
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#define CONFIG_SYS_NS16550_SERIAL
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#define CONFIG_SYS_NS16550_REG_SIZE -4 /* NS16550 register size */
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#define CONFIG_SYS_NS16550_COM1 DAVINCI_UART2_BASE /* Base address of UART2 */
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#define CONFIG_SYS_NS16550_CLK clk_get(DAVINCI_UART2_CLKID)
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#define CONFIG_CONS_INDEX 1 /* use UART0 for console */
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#define CONFIG_BAUDRATE 115200 /* Default baud rate */
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/*
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* I2C Configuration
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*/
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_DAVINCI
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#define CONFIG_SYS_DAVINCI_I2C_SPEED 25000 /* 100Kbps won't work, H/W bug */
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#define CONFIG_SYS_DAVINCI_I2C_SLAVE 10 /* Bogus, master-only in U-Boot */
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/*
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* I2C EEPROM definitions for catalyst 24W256 EEPROM chip
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*/
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#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
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#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6
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#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 20
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/*
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* Network & Ethernet Configuration
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*/
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#ifdef CONFIG_DRIVER_TI_EMAC
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#define CONFIG_MII
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#define CONFIG_BOOTP_DNS
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#define CONFIG_BOOTP_DNS2
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#define CONFIG_BOOTP_SEND_HOSTNAME
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#define CONFIG_NET_RETRY_COUNT 10
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#endif
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/*
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* Flash & Environment
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*/
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#ifdef CONFIG_USE_NAND
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#undef CONFIG_ENV_IS_IN_FLASH
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#define CONFIG_NAND_DAVINCI
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_ENV_IS_IN_NAND /* U-Boot env in NAND Flash */
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#define CONFIG_ENV_OFFSET (512 << 10)
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#define CONFIG_ENV_SIZE (10 << 10) /* 10KB */
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#define CONFIG_SYS_NAND_USE_FLASH_BBT
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#define CONFIG_SYS_NAND_4BIT_HW_ECC_OOBFIRST
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#define CONFIG_SYS_NAND_PAGE_2K
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#define CONFIG_SYS_NAND_CS 3
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#define CONFIG_SYS_NAND_BASE DAVINCI_ASYNC_EMIF_DATA_CE3_BASE
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#define CONFIG_SYS_NAND_PAGE_2K
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#define CONFIG_SYS_NAND_MASK_CLE 0x10
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#define CONFIG_SYS_NAND_MASK_ALE 0x8
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#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND devices */
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#endif
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#ifdef CONFIG_USE_NOR
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#define CONFIG_ENV_IS_IN_FLASH
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#undef CONFIG_SYS_NO_FLASH
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#define CONFIG_SYS_FLASH_CFI_DRIVER
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#define CONFIG_SYS_FLASH_CFI
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#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of flash banks */
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#define CONFIG_SYS_FLASH_SECT_SZ (64 << 10) /* 64KB */
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#define CONFIG_ENV_OFFSET (CONFIG_SYS_FLASH_SECT_SZ*3)
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#define CONFIG_SYS_FLASH_BASE DAVINCI_ASYNC_EMIF_DATA_CE2_BASE
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#define PHYS_FLASH_SIZE (32 << 20) /* Flash size 32MB */
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#define CONFIG_SYS_MAX_FLASH_SECT (PHYS_FLASH_SIZE/CONFIG_SYS_FLASH_SECT_SZ)
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#define CONFIG_ENV_SECT_SIZE CONFIG_SYS_FLASH_SECT_SZ
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#define CONFIG_SYS_FLASH_SPL_ACCESS
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#endif
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#ifdef CONFIG_USE_SPIFLASH
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#undef CONFIG_ENV_IS_IN_FLASH
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#undef CONFIG_ENV_IS_IN_NAND
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#define CONFIG_ENV_IS_IN_SPI_FLASH
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#define CONFIG_ENV_SIZE (16 << 10)
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#define CONFIG_ENV_OFFSET (256 << 10)
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#define CONFIG_ENV_SECT_SIZE 4096
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_SPI
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#define CONFIG_SPI_FLASH
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#define CONFIG_SPI_FLASH_WINBOND
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#define CONFIG_DAVINCI_SPI
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#define CONFIG_SYS_SPI_BASE DAVINCI_SPI0_BASE
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#define CONFIG_SYS_SPI_CLK clk_get(DAVINCI_SPI0_CLKID)
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#define CONFIG_SF_DEFAULT_SPEED 30000000
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#define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED
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#endif
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/*
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* USB configuration
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*/
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#define CONFIG_USB_DA8XX /* Platform hookup to MUSB controller */
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#define CONFIG_MUSB_HCD
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/*
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* U-Boot general configuration
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*/
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#undef CONFIG_MISC_INIT_R
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#undef CONFIG_BOOTDELAY
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#define CONFIG_BOOTFILE "uImage" /* Boot file name */
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#define CONFIG_SYS_PROMPT "U-Boot > " /* Command Prompt */
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#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
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#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Args Buffer Size */
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#define CONFIG_SYS_LOAD_ADDR (PHYS_SDRAM_1 + 0x700000)
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#define CONFIG_VERSION_VARIABLE
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#define CONFIG_AUTO_COMPLETE /* Won't work with hush so far, may be later */
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#define CONFIG_SYS_HUSH_PARSER
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#define CONFIG_CMDLINE_EDITING
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_CRC32_VERIFY
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#define CONFIG_MX_CYCLIC
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/*
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* Linux Information
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*/
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#define LINUX_BOOT_PARAM_ADDR (PHYS_SDRAM_1 + 0x100)
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_BOOTARGS "mem=32M console=ttyS2,115200n8 root=/dev/mtdblock/2 rw noinitrd ip=dhcp"
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#define CONFIG_BOOTCOMMAND ""
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#define CONFIG_BOOTDELAY 3
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/*
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* U-Boot commands
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*/
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#include <config_cmd_default.h>
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#define CONFIG_CMD_ENV
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#define CONFIG_CMD_ASKENV
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#define CONFIG_CMD_DHCP
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#define CONFIG_CMD_DIAG
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#define CONFIG_CMD_MII
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#define CONFIG_CMD_PING
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#define CONFIG_CMD_SAVES
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#define CONFIG_CMD_MEMORY
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#undef CONFIG_CMD_FPGA
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#undef CONFIG_CMD_SETGETDCR
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#ifdef CONFIG_CMD_BDI
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#define CONFIG_CLOCKS
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#endif
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#ifndef CONFIG_DRIVER_TI_EMAC
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#undef CONFIG_CMD_NET
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#undef CONFIG_CMD_DHCP
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#undef CONFIG_CMD_MII
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#undef CONFIG_CMD_PING
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#endif
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#ifdef CONFIG_USE_NAND
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#undef CONFIG_CMD_FLASH
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#undef CONFIG_CMD_IMLS
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_MTDPARTS
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#define CONFIG_MTD_PARTITIONS
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#define CONFIG_MTD_DEVICE
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#endif
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#ifdef CONFIG_USE_SPIFLASH
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#undef CONFIG_CMD_IMLS
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#undef CONFIG_CMD_FLASH
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#define CONFIG_CMD_SPI
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#define CONFIG_CMD_SF
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#define CONFIG_CMD_SAVEENV
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#endif
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/* SD/MMC configuration */
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#ifndef CONFIG_USE_NAND
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#define CONFIG_MMC
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#define CONFIG_DAVINCI_MMC_SD1
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#define CONFIG_GENERIC_MMC
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#define CONFIG_DAVINCI_MMC
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#endif
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/*
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* Enable MMC commands only when
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* MMC support is present
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*/
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#if defined(CONFIG_MMC) || defined(CONFIG_USB_DA8XX)
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#define CONFIG_DOS_PARTITION /* include support for FAT/storage */
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#define CONFIG_CMD_FAT /* include support for FAT cmd */
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#endif
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#ifdef CONFIG_MMC
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#define CONFIG_CMD_MMC
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#define CONFIG_CMD_EXT2
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#endif
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#if !defined(CONFIG_USE_NAND) && \
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!defined(CONFIG_USE_NOR) && \
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!defined(CONFIG_USE_SPIFLASH)
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#define CONFIG_ENV_IS_NOWHERE
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_ENV_SIZE (16 << 10)
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#undef CONFIG_CMD_IMLS
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#undef CONFIG_CMD_FLASH
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#undef CONFIG_CMD_ENV
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#endif
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#ifdef CONFIG_USB_DA8XX
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#ifdef CONFIG_MUSB_HCD /* include support for usb host */
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#define CONFIG_CMD_USB /* include support for usb cmd */
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#define CONFIG_USB_STORAGE /* MSC class support */
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#define CONFIG_CMD_STORAGE /* inclue support for usb-storage cmd */
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#ifdef CONFIG_USB_KEYBOARD /* HID class support */
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#define CONFIG_SYS_USB_EVENT_POLL
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#define CONFIG_PREBOOT "usb start"
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#endif /* CONFIG_USB_KEYBOARD */
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#endif /* CONFIG_MUSB_HCD */
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#ifdef CONFIG_MUSB_UDC
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/* USB device configuration */
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#define CONFIG_USB_DEVICE 1
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#define CONFIG_USB_TTY 1
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#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
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/* Change these to suit your needs */
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#define CONFIG_USBD_VENDORID 0x0451
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#define CONFIG_USBD_PRODUCTID 0x5678
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#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
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#define CONFIG_USBD_PRODUCT_NAME "DA830EVM"
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#endif /* CONFIG_MUSB_UDC */
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#endif /* CONFIG_USB_DA8XX */
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#ifdef CONFIG_MTD_PARTITIONS
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#define MTDIDS_DEFAULT "nand0=davinci_nand.1"
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#define PART_BOOT "512k(bootloader)ro,"
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#define PART_PARAMS "512k(params)ro,"
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#define PART_KERNEL "4m(kernel),"
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#define PART_REST "-(filesystem)"
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#define MTDPARTS_DEFAULT \
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"mtdparts=davinci_nand.1:" PART_BOOT PART_PARAMS PART_KERNEL PART_REST
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#endif
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#define CONFIG_MAX_RAM_BANK_SIZE (512 << 20) /* max size from SPRS586*/
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/* additions for new relocation code, must be added to all boards */
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_SDRAM_BASE + 0x1000 - GENERATED_GBL_DATA_SIZE)
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#endif /* __CONFIG_H */
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