upstream u-boot with additional patches for our devices/boards: https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ; Gbit ethernet patch for some LIME2 revisions ; with SPI flash support

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Sonic Zhang f4d8038439 blackfin: run core1 from L1 code sram start address in uboot init code on core 0 ... Define core 1 L1 code sram start address. Add function to enable core 1 for BF609 and BF561. Add config macro to allow customer to run core 1 in uboot init code on core 0. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>		12 years ago
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BF561_cdef.h	…
BF561_def.h	blackfin: run core1 from L1 code sram start address in uboot init code on core 0	12 years ago
anomaly.h	…
def_local.h	…
gpio.h	…
portmux.h	…
ports.h	…