upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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659 lines
15 KiB
659 lines
15 KiB
/*
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* (C) Copyright 2001
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* Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
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*
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* (C) Copyright 2001-2004
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <linux/byteorder/swab.h>
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flash_info_t flash_info[CONFIG_SYS_MAX_FLASH_BANKS]; /* info for FLASH chips */
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/* Board support for 1 or 2 flash devices */
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#define FLASH_PORT_WIDTH32
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#undef FLASH_PORT_WIDTH16
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#ifdef FLASH_PORT_WIDTH16
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#define FLASH_PORT_WIDTH ushort
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#define FLASH_PORT_WIDTHV vu_short
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#define SWAP(x) (x)
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#else
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#define FLASH_PORT_WIDTH ulong
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#define FLASH_PORT_WIDTHV vu_long
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#define SWAP(x) (x)
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#endif
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/* Intel-compatible flash ID */
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#define INTEL_COMPAT 0x00890089
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#define INTEL_ALT 0x00B000B0
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/* Intel-compatible flash commands */
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#define INTEL_PROGRAM 0x00100010
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#define INTEL_ERASE 0x00200020
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#define INTEL_CLEAR 0x00500050
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#define INTEL_LOCKBIT 0x00600060
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#define INTEL_PROTECT 0x00010001
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#define INTEL_STATUS 0x00700070
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#define INTEL_READID 0x00900090
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#define INTEL_CONFIRM 0x00D000D0
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#define INTEL_RESET 0xFFFFFFFF
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/* Intel-compatible flash status bits */
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#define INTEL_FINISHED 0x00800080
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#define INTEL_OK 0x00800080
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#define FPW FLASH_PORT_WIDTH
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#define FPWV FLASH_PORT_WIDTHV
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#define mb() __asm__ __volatile__ ("" : : : "memory")
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/*-----------------------------------------------------------------------
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* Functions
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*/
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static ulong flash_get_size (FPW *addr, flash_info_t *info);
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static int write_data (flash_info_t *info, ulong dest, FPW data);
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static void flash_get_offsets (ulong base, flash_info_t *info);
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void inline spin_wheel (void);
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static void flash_sync_real_protect (flash_info_t * info);
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static unsigned char intel_sector_protected (flash_info_t *info, ushort sector);
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/*-----------------------------------------------------------------------
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*/
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unsigned long flash_init (void)
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{
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int i;
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ulong size = 0;
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extern void flash_preinit(void);
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extern void flash_afterinit(ulong, ulong);
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ulong flashbase = CONFIG_SYS_FLASH_BASE;
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flash_preinit();
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for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
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switch (i) {
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case 0:
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memset(&flash_info[i], 0, sizeof(flash_info_t));
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flash_get_size ((FPW *) flashbase, &flash_info[i]);
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flash_get_offsets (flash_info[i].start[0], &flash_info[i]);
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break;
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default:
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panic ("configured to many flash banks!\n");
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break;
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}
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size += flash_info[i].size;
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/* get the h/w and s/w protection status in sync */
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flash_sync_real_protect(&flash_info[i]);
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}
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/* Protect monitor and environment sectors
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*/
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#if CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE
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#ifndef CONFIG_BOOT_ROM
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flash_protect ( FLAG_PROTECT_SET,
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CONFIG_SYS_MONITOR_BASE,
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CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
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&flash_info[0] );
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#endif
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#endif
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#ifdef CONFIG_ENV_IS_IN_FLASH
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flash_protect ( FLAG_PROTECT_SET,
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CONFIG_ENV_ADDR,
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CONFIG_ENV_ADDR + CONFIG_ENV_SIZE - 1, &flash_info[0] );
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#endif
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flash_afterinit(flash_info[0].start[0], flash_info[0].size);
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return size;
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}
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/*-----------------------------------------------------------------------
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*/
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static void flash_get_offsets (ulong base, flash_info_t *info)
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{
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int i;
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if (info->flash_id == FLASH_UNKNOWN) {
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return;
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}
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if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) {
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for (i = 0; i < info->sector_count; i++) {
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info->start[i] = base + (i * PHYS_FLASH_SECT_SIZE);
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}
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}
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}
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/*-----------------------------------------------------------------------
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*/
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void flash_print_info (flash_info_t *info)
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{
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int i;
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if (info->flash_id == FLASH_UNKNOWN) {
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printf ("missing or unknown FLASH type\n");
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return;
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}
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switch (info->flash_id & FLASH_VENDMASK) {
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case FLASH_MAN_INTEL:
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printf ("INTEL ");
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break;
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default:
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printf ("Unknown Vendor ");
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break;
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}
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switch (info->flash_id & FLASH_TYPEMASK) {
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case FLASH_28F256J3A:
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printf ("28F256J3A\n");
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break;
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case FLASH_28F128J3A:
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printf ("28F128J3A\n");
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break;
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case FLASH_28F640J3A:
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printf ("28F640J3A\n");
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break;
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case FLASH_28F320J3A:
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printf ("28F320J3A\n");
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break;
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default:
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printf ("Unknown Chip Type\n");
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break;
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}
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printf (" Size: %ld MB in %d Sectors\n",
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info->size >> 20, info->sector_count);
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printf (" Sector Start Addresses:");
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for (i = 0; i < info->sector_count; ++i) {
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if ((i % 5) == 0)
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printf ("\n ");
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printf (" %08lX%s",
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info->start[i],
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info->protect[i] ? " (RO)" : " ");
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}
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printf ("\n");
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return;
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}
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/*
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* The following code cannot be run from FLASH!
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*/
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static ulong flash_get_size (FPW *addr, flash_info_t *info)
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{
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volatile FPW value;
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/* Write auto select command: read Manufacturer ID */
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addr[0x5555] = (FPW) 0x00AA00AA;
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addr[0x2AAA] = (FPW) 0x00550055;
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addr[0x5555] = (FPW) 0x00900090;
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mb ();
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udelay(100);
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value = addr[0];
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switch (value) {
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case (FPW) INTEL_MANUFACT:
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info->flash_id = FLASH_MAN_INTEL;
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break;
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default:
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info->flash_id = FLASH_UNKNOWN;
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info->sector_count = 0;
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info->size = 0;
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addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
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return (0); /* no or unknown flash */
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}
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mb ();
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value = addr[1]; /* device ID */
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switch (value) {
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case (FPW) INTEL_ID_28F256J3A:
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info->flash_id += FLASH_28F256J3A;
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/* In U-Boot we support only 32 MB (no bank-switching) */
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info->sector_count = 256 / 2;
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info->size = 0x04000000 / 2;
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info->start[0] = CONFIG_SYS_FLASH_BASE + 0x02000000;
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break; /* => 32 MB */
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case (FPW) INTEL_ID_28F128J3A:
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info->flash_id += FLASH_28F128J3A;
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info->sector_count = 128;
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info->size = 0x02000000;
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info->start[0] = CONFIG_SYS_FLASH_BASE + 0x02000000;
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break; /* => 32 MB */
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case (FPW) INTEL_ID_28F640J3A:
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info->flash_id += FLASH_28F640J3A;
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info->sector_count = 64;
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info->size = 0x01000000;
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info->start[0] = CONFIG_SYS_FLASH_BASE + 0x03000000;
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break; /* => 16 MB */
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case (FPW) INTEL_ID_28F320J3A:
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info->flash_id += FLASH_28F320J3A;
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info->sector_count = 32;
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info->size = 0x800000;
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info->start[0] = CONFIG_SYS_FLASH_BASE + 0x03800000;
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break; /* => 8 MB */
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default:
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info->flash_id = FLASH_UNKNOWN;
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break;
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}
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if (info->sector_count > CONFIG_SYS_MAX_FLASH_SECT) {
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printf ("** ERROR: sector count %d > max (%d) **\n",
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info->sector_count, CONFIG_SYS_MAX_FLASH_SECT);
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info->sector_count = CONFIG_SYS_MAX_FLASH_SECT;
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}
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addr[0] = (FPW) 0x00FF00FF; /* restore read mode */
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return (info->size);
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}
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/*
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* This function gets the u-boot flash sector protection status
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* (flash_info_t.protect[]) in sync with the sector protection
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* status stored in hardware.
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*/
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static void flash_sync_real_protect (flash_info_t * info)
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{
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int i;
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switch (info->flash_id & FLASH_TYPEMASK) {
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case FLASH_28F256J3A:
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case FLASH_28F128J3A:
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case FLASH_28F640J3A:
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case FLASH_28F320J3A:
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for (i = 0; i < info->sector_count; ++i) {
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info->protect[i] = intel_sector_protected(info, i);
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}
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break;
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default:
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/* no h/w protect support */
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break;
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}
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}
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/*
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* checks if "sector" in bank "info" is protected. Should work on intel
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* strata flash chips 28FxxxJ3x in 8-bit mode.
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* Returns 1 if sector is protected (or timed-out while trying to read
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* protection status), 0 if it is not.
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*/
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static unsigned char intel_sector_protected (flash_info_t *info, ushort sector)
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{
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FPWV *addr;
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FPWV *lock_conf_addr;
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ulong start;
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unsigned char ret;
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/*
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* first, wait for the WSM to be finished. The rationale for
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* waiting for the WSM to become idle for at most
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* CONFIG_SYS_FLASH_ERASE_TOUT is as follows. The WSM can be busy
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* because of: (1) erase, (2) program or (3) lock bit
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* configuration. So we just wait for the longest timeout of
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* the (1)-(3), i.e. the erase timeout.
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*/
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/* wait at least 35ns (W12) before issuing Read Status Register */
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udelay(1);
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addr = (FPWV *) info->start[sector];
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*addr = (FPW) INTEL_STATUS;
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start = get_timer (0);
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while ((*addr & (FPW) INTEL_FINISHED) != (FPW) INTEL_FINISHED) {
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if (get_timer (start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
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*addr = (FPW) INTEL_RESET; /* restore read mode */
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printf("WSM busy too long, can't get prot status\n");
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return 1;
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}
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}
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/* issue the Read Identifier Codes command */
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*addr = (FPW) INTEL_READID;
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/* wait at least 35ns (W12) before reading */
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udelay(1);
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/* Intel example code uses offset of 2 for 16 bit flash */
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lock_conf_addr = (FPWV *) info->start[sector] + 2;
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ret = (*lock_conf_addr & (FPW) INTEL_PROTECT) ? 1 : 0;
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/* put flash back in read mode */
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*addr = (FPW) INTEL_RESET;
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return ret;
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}
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/*-----------------------------------------------------------------------
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*/
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int flash_erase (flash_info_t *info, int s_first, int s_last)
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{
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int flag, prot, sect;
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ulong type, start;
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int rcode = 0;
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if ((s_first < 0) || (s_first > s_last)) {
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if (info->flash_id == FLASH_UNKNOWN) {
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printf ("- missing\n");
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} else {
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printf ("- no sectors to erase\n");
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}
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return 1;
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}
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type = (info->flash_id & FLASH_VENDMASK);
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if ((type != FLASH_MAN_INTEL)) {
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printf ("Can't erase unknown flash type %08lx - aborted\n",
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info->flash_id);
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return 1;
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}
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prot = 0;
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for (sect = s_first; sect <= s_last; ++sect) {
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if (info->protect[sect]) {
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prot++;
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}
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}
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if (prot) {
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printf ("- Warning: %d protected sectors will not be erased!\n",
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prot);
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} else {
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printf ("\n");
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}
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start = get_timer (0);
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/* Disable interrupts which might cause a timeout here */
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flag = disable_interrupts ();
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/* Start erase on unprotected sectors */
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for (sect = s_first; sect <= s_last; sect++) {
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if (info->protect[sect] == 0) { /* not protected */
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FPWV *addr = (FPWV *) (info->start[sect]);
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FPW status;
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printf ("Erasing sector %2d ... ", sect);
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/* arm simple, non interrupt dependent timer */
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start = get_timer(0);
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*addr = (FPW) 0x00500050; /* clear status register */
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*addr = (FPW) 0x00200020; /* erase setup */
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*addr = (FPW) 0x00D000D0; /* erase confirm */
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while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
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if (get_timer(start) > CONFIG_SYS_FLASH_ERASE_TOUT) {
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printf ("Timeout\n");
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*addr = (FPW) 0x00B000B0; /* suspend erase */
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*addr = (FPW) 0x00FF00FF; /* reset to read mode */
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rcode = 1;
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break;
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}
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}
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*addr = 0x00500050; /* clear status register cmd. */
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*addr = 0x00FF00FF; /* resest to read mode */
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printf (" done\n");
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}
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}
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if (flag)
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enable_interrupts();
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return rcode;
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}
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/*-----------------------------------------------------------------------
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* Copy memory to flash, returns:
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* 0 - OK
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* 1 - write timeout
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* 2 - Flash not erased
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* 4 - Flash not identified
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*/
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int write_buff (flash_info_t *info, uchar *src, ulong addr, ulong cnt)
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{
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ulong cp, wp;
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FPW data;
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int count, i, l, rc, port_width;
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if (info->flash_id == FLASH_UNKNOWN) {
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return 4;
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}
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/* get lower word aligned address */
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#ifdef FLASH_PORT_WIDTH16
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wp = (addr & ~1);
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port_width = 2;
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#else
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wp = (addr & ~3);
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port_width = 4;
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#endif
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/*
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* handle unaligned start bytes
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*/
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if ((l = addr - wp) != 0) {
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data = 0;
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for (i = 0, cp = wp; i < l; ++i, ++cp) {
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data = (data << 8) | (*(uchar *) cp);
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}
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for (; i < port_width && cnt > 0; ++i) {
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data = (data << 8) | *src++;
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--cnt;
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++cp;
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}
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for (; cnt == 0 && i < port_width; ++i, ++cp) {
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data = (data << 8) | (*(uchar *) cp);
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}
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if ((rc = write_data (info, wp, SWAP (data))) != 0) {
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return (rc);
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}
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wp += port_width;
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}
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/*
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* handle word aligned part
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*/
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count = 0;
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while (cnt >= port_width) {
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data = 0;
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for (i = 0; i < port_width; ++i) {
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data = (data << 8) | *src++;
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}
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if ((rc = write_data (info, wp, SWAP (data))) != 0) {
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return (rc);
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}
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wp += port_width;
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cnt -= port_width;
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if (count++ > 0x800) {
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spin_wheel ();
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count = 0;
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}
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}
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if (cnt == 0) {
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return (0);
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}
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/*
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* handle unaligned tail bytes
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*/
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data = 0;
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for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) {
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data = (data << 8) | *src++;
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--cnt;
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}
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for (; i < port_width; ++i, ++cp) {
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data = (data << 8) | (*(uchar *) cp);
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}
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return (write_data (info, wp, SWAP (data)));
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}
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/*-----------------------------------------------------------------------
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* Write a word or halfword to Flash, returns:
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* 0 - OK
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* 1 - write timeout
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* 2 - Flash not erased
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*/
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static int write_data (flash_info_t *info, ulong dest, FPW data)
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{
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FPWV *addr = (FPWV *) dest;
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ulong status;
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ulong start;
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int flag;
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int rcode = 0;
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/* Check if Flash is (sufficiently) erased */
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if ((*addr & data) != data) {
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printf ("not erased at %08lx (%lx)\n", (ulong) addr, *addr);
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return (2);
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}
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/* Disable interrupts which might cause a timeout here */
|
|
flag = disable_interrupts ();
|
|
|
|
*addr = (FPW) 0x00400040; /* write setup */
|
|
*addr = data;
|
|
|
|
/* arm simple, non interrupt dependent timer */
|
|
start = get_timer(0);
|
|
|
|
/* wait while polling the status register */
|
|
while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) {
|
|
if (get_timer(start) > CONFIG_SYS_FLASH_WRITE_TOUT) {
|
|
rcode = 1;
|
|
break;
|
|
}
|
|
}
|
|
|
|
*addr = (FPW) 0x00FF00FF; /* restore read mode */
|
|
|
|
if (flag)
|
|
enable_interrupts();
|
|
|
|
return rcode;
|
|
}
|
|
|
|
void inline spin_wheel (void)
|
|
{
|
|
static int p = 0;
|
|
static char w[] = "\\/-";
|
|
|
|
printf ("\010%c", w[p]);
|
|
(++p == 3) ? (p = 0) : 0;
|
|
}
|
|
|
|
/*-----------------------------------------------------------------------
|
|
* Set/Clear sector's lock bit, returns:
|
|
* 0 - OK
|
|
* 1 - Error (timeout, voltage problems, etc.)
|
|
*/
|
|
int flash_real_protect (flash_info_t *info, long sector, int prot)
|
|
{
|
|
ulong start;
|
|
int i;
|
|
int rc = 0;
|
|
vu_long *addr = (vu_long *)(info->start[sector]);
|
|
int flag = disable_interrupts();
|
|
|
|
*addr = INTEL_CLEAR; /* Clear status register */
|
|
if (prot) { /* Set sector lock bit */
|
|
*addr = INTEL_LOCKBIT; /* Sector lock bit */
|
|
*addr = INTEL_PROTECT; /* set */
|
|
}
|
|
else { /* Clear sector lock bit */
|
|
*addr = INTEL_LOCKBIT; /* All sectors lock bits */
|
|
*addr = INTEL_CONFIRM; /* clear */
|
|
}
|
|
|
|
start = get_timer(0);
|
|
|
|
while ((*addr & INTEL_FINISHED) != INTEL_FINISHED) {
|
|
if (get_timer(start) > CONFIG_SYS_FLASH_UNLOCK_TOUT) {
|
|
printf("Flash lock bit operation timed out\n");
|
|
rc = 1;
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (*addr != INTEL_OK) {
|
|
printf("Flash lock bit operation failed at %08X, CSR=%08X\n",
|
|
(uint)addr, (uint)*addr);
|
|
rc = 1;
|
|
}
|
|
|
|
if (!rc)
|
|
info->protect[sector] = prot;
|
|
|
|
/*
|
|
* Clear lock bit command clears all sectors lock bits, so
|
|
* we have to restore lock bits of protected sectors.
|
|
* WARNING: code below re-locks sectors only for one bank (info).
|
|
* This causes problems on boards where several banks share
|
|
* the same chip, as sectors in othere banks will be unlocked
|
|
* but not re-locked. It works fine on pm520 though, as there
|
|
* is only one chip and one bank.
|
|
*/
|
|
if (!prot)
|
|
{
|
|
for (i = 0; i < info->sector_count; i++)
|
|
{
|
|
if (info->protect[i])
|
|
{
|
|
start = get_timer(0);
|
|
addr = (vu_long *)(info->start[i]);
|
|
*addr = INTEL_LOCKBIT; /* Sector lock bit */
|
|
*addr = INTEL_PROTECT; /* set */
|
|
while ((*addr & INTEL_FINISHED) != INTEL_FINISHED)
|
|
{
|
|
if (get_timer(start) > CONFIG_SYS_FLASH_UNLOCK_TOUT)
|
|
{
|
|
printf("Flash lock bit operation timed out\n");
|
|
rc = 1;
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
/*
|
|
* get the s/w sector protection status in sync with the h/w,
|
|
* in case something went wrong during the re-locking.
|
|
*/
|
|
flash_sync_real_protect(info); /* resets flash to read mode */
|
|
}
|
|
|
|
if (flag)
|
|
enable_interrupts();
|
|
|
|
*addr = INTEL_RESET; /* Reset to read array mode */
|
|
|
|
return rc;
|
|
}
|
|
|