upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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180 lines
4.7 KiB
180 lines
4.7 KiB
/*
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*
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* Congatec Conga-QEVAl board configuration file.
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*
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* Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
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* Based on Freescale i.MX6Q Sabre Lite board configuration file.
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* Copyright (C) 2013, Adeneo Embedded <www.adeneo-embedded.com>
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* Leo Sartre, <lsartre@adeneo-embedded.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __CONFIG_CGTQMX6EVAL_H
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#define __CONFIG_CGTQMX6EVAL_H
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#define CONFIG_MX6
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#include "mx6_common.h"
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#define CONFIG_DISPLAY_CPUINFO
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#define CONFIG_DISPLAY_BOARDINFO
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#define CONFIG_MACH_TYPE 4122
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#include <asm/arch/imx-regs.h>
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#include <asm/imx-common/gpio.h>
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#define CONFIG_CMDLINE_TAG
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#define CONFIG_SETUP_MEMORY_TAGS
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#define CONFIG_INITRD_TAG
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#define CONFIG_REVISION_TAG
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_MISC_INIT_R
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#define CONFIG_MXC_GPIO
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#define CONFIG_MXC_UART
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#define CONFIG_MXC_UART_BASE UART2_BASE
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/* MMC Configs */
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#define CONFIG_FSL_ESDHC
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#define CONFIG_FSL_USDHC
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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#define CONFIG_MMC
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#define CONFIG_CMD_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_BOUNCE_BUFFER
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#define CONFIG_CMD_EXT2
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#define CONFIG_CMD_FAT
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#define CONFIG_DOS_PARTITION
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/* Miscellaneous commands */
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#define CONFIG_CMD_BMODE
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_CONS_INDEX 1
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#define CONFIG_BAUDRATE 115200
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/* Command definition */
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#include <config_cmd_default.h>
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#undef CONFIG_CMD_IMLS
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#define CONFIG_BOOTDELAY 3
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#define CONFIG_LOADADDR 0x12000000
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#define CONFIG_SYS_TEXT_BASE 0x17800000
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#define CONFIG_DEFAULT_FDT_FILE "imx6q-congatec.dtb"
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"script=boot.scr\0" \
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"image=zImage\0" \
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"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
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"boot_dir=/boot\0" \
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"console=ttymxc1\0" \
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"fdt_high=0xffffffff\0" \
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"initrd_high=0xffffffff\0" \
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"fdt_addr=0x18000000\0" \
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"boot_fdt=try\0" \
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"mmcdev=1\0" \
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"mmcpart=1\0" \
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"mmcroot=/dev/mmcblk0p1 rootwait rw\0" \
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"mmcargs=setenv bootargs console=${console},${baudrate} " \
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"root=${mmcroot}\0" \
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"loadbootscript=" \
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"ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
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"bootscript=echo Running bootscript from mmc ...; " \
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"source\0" \
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"loadimage=ext2load mmc ${mmcdev}:${mmcpart} ${loadaddr} " \
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"${boot_dir}/${image}\0" \
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"loadfdt=ext2load mmc ${mmcdev}:${mmcpart} ${fdt_addr} " \
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"${boot_dir}/${fdt_file}\0" \
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"mmcboot=echo Booting from mmc ...; " \
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"run mmcargs; " \
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"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
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"if run loadfdt; then " \
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"bootz ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"if test ${boot_fdt} = try; then " \
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"bootz; " \
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"else " \
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"echo WARN: Cannot load the DT; " \
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"fi; " \
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"fi; " \
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"else " \
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"bootz; " \
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"fi;\0"
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#define CONFIG_BOOTCOMMAND \
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"mmc dev ${mmcdev};" \
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"mmc dev ${mmcdev}; if mmc rescan; then " \
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"if run loadbootscript; then " \
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"run bootscript; " \
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"else " \
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"if run loadimage; then " \
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"run mmcboot; " \
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"else "\
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"echo ERR: Fail to boot from mmc; " \
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"fi; " \
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"fi; " \
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"else echo ERR: Fail to boot from mmc; fi"
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/* Miscellaneous configurable options */
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#define CONFIG_SYS_LONGHELP
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#define CONFIG_SYS_HUSH_PARSER
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#define CONFIG_SYS_PROMPT "CGT-QMX6-Quad U-Boot > "
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#define CONFIG_AUTO_COMPLETE
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#define CONFIG_SYS_CBSIZE 256
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/* Print Buffer Size */
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#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
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#define CONFIG_SYS_MAXARGS 16
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#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
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#define CONFIG_SYS_MEMTEST_START 0x10000000
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#define CONFIG_SYS_MEMTEST_END 0x10010000
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#define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#define CONFIG_CMDLINE_EDITING
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/* Physical Memory Map */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024)
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/* FLASH and environment organization */
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_ENV_SIZE (8 * 1024)
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#define CONFIG_ENV_IS_IN_MMC
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#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#define CONFIG_OF_LIBFDT
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#define CONFIG_CMD_BOOTZ
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#ifndef CONFIG_SYS_DCACHE_OFF
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#define CONFIG_CMD_CACHE
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#endif
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#endif /* __CONFIG_CGTQMX6EVAL_H */
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