upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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253 lines
6.7 KiB
253 lines
6.7 KiB
/*
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* (C) Copyright 2000-2002
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <mpc8260.h>
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#include <asm/processor.h>
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#if defined(CONFIG_BOARD_GET_CPU_CLK_F)
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extern unsigned long board_get_cpu_clk_f (void);
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#endif
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DECLARE_GLOBAL_DATA_PTR;
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/* ------------------------------------------------------------------------- */
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/* Bus-to-Core Multiplier */
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#define _1x 2
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#define _1_5x 3
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#define _2x 4
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#define _2_5x 5
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#define _3x 6
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#define _3_5x 7
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#define _4x 8
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#define _4_5x 9
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#define _5x 10
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#define _5_5x 11
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#define _6x 12
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#define _6_5x 13
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#define _7x 14
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#define _7_5x 15
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#define _8x 16
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#define _byp -1
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#define _off -2
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#define _unk -3
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typedef struct {
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int b2c_mult;
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int vco_div;
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char *freq_60x;
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char *freq_core;
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} corecnf_t;
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/*
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* this table based on "Errata to MPC8260 PowerQUICC II User's Manual",
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* Rev. 1, 8/2000, page 10.
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*/
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corecnf_t corecnf_tab[] = {
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{ _1_5x, 4, " 33-100", " 33-100" }, /* 0x00 */
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{ _1x, 4, " 50-150", " 50-150" }, /* 0x01 */
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{ _1x, 8, " 25-75 ", " 25-75 " }, /* 0x02 */
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{ _byp, -1, " ?-? ", " ?-? " }, /* 0x03 */
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{ _2x, 2, " 50-150", "100-300" }, /* 0x04 */
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{ _2x, 4, " 25-75 ", " 50-150" }, /* 0x05 */
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{ _2_5x, 2, " 40-120", "100-240" }, /* 0x06 */
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{ _4_5x, 2, " 22-65 ", "100-300" }, /* 0x07 */
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{ _3x, 2, " 33-100", "100-300" }, /* 0x08 */
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{ _5_5x, 2, " 18-55 ", "100-300" }, /* 0x09 */
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{ _4x, 2, " 25-75 ", "100-300" }, /* 0x0A */
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{ _5x, 2, " 20-60 ", "100-300" }, /* 0x0B */
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{ _1_5x, 8, " 16-50 ", " 16-50 " }, /* 0x0C */
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{ _6x, 2, " 16-50 ", "100-300" }, /* 0x0D */
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{ _3_5x, 2, " 30-85 ", "100-300" }, /* 0x0E */
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{ _off, -1, " ?-? ", " ?-? " }, /* 0x0F */
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{ _3x, 4, " 16-50 ", " 50-150" }, /* 0x10 */
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{ _2_5x, 4, " 20-60 ", " 50-120" }, /* 0x11 */
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{ _6_5x, 2, " 15-46 ", "100-300" }, /* 0x12 */
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{ _byp, -1, " ?-? ", " ?-? " }, /* 0x13 */
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{ _7x, 2, " 14-43 ", "100-300" }, /* 0x14 */
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{ _2x, 4, " 25-75 ", " 50-150" }, /* 0x15 */
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{ _7_5x, 2, " 13-40 ", "100-300" }, /* 0x16 */
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{ _4_5x, 2, " 22-65 ", "100-300" }, /* 0x17 */
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{ _unk, -1, " ?-? ", " ?-? " }, /* 0x18 */
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{ _5_5x, 2, " 18-55 ", "100-300" }, /* 0x19 */
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{ _4x, 2, " 25-75 ", "100-300" }, /* 0x1A */
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{ _5x, 2, " 20-60 ", "100-300" }, /* 0x1B */
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{ _8x, 2, " 12-38 ", "100-300" }, /* 0x1C */
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{ _6x, 2, " 16-50 ", "100-300" }, /* 0x1D */
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{ _3_5x, 2, " 30-85 ", "100-300" }, /* 0x1E */
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{ _off, -1, " ?-? ", " ?-? " }, /* 0x1F */
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};
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/* ------------------------------------------------------------------------- */
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/*
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*
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*/
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int get_clocks (void)
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{
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volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
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ulong clkin;
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ulong sccr, dfbrg;
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ulong scmr, corecnf, busdf, cpmdf, plldf, pllmf;
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corecnf_t *cp;
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#if !defined(CONFIG_8260_CLKIN)
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#error clock measuring not implemented yet - define CONFIG_8260_CLKIN
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#else
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#if defined(CONFIG_BOARD_GET_CPU_CLK_F)
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clkin = board_get_cpu_clk_f ();
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#else
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clkin = CONFIG_8260_CLKIN;
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#endif
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#endif
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sccr = immap->im_clkrst.car_sccr;
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dfbrg = (sccr & SCCR_DFBRG_MSK) >> SCCR_DFBRG_SHIFT;
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scmr = immap->im_clkrst.car_scmr;
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corecnf = (scmr & SCMR_CORECNF_MSK) >> SCMR_CORECNF_SHIFT;
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cp = &corecnf_tab[corecnf];
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busdf = (scmr & SCMR_BUSDF_MSK) >> SCMR_BUSDF_SHIFT;
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cpmdf = (scmr & SCMR_CPMDF_MSK) >> SCMR_CPMDF_SHIFT;
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/* HiP7, HiP7 Rev01, HiP7 RevA */
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if ((get_pvr () == PVR_8260_HIP7) ||
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(get_pvr () == PVR_8260_HIP7R1) ||
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(get_pvr () == PVR_8260_HIP7RA)) {
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pllmf = (scmr & SCMR_PLLMF_MSKH7) >> SCMR_PLLMF_SHIFT;
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gd->vco_out = clkin * (pllmf + 1);
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} else { /* HiP3, HiP4 */
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pllmf = (scmr & SCMR_PLLMF_MSK) >> SCMR_PLLMF_SHIFT;
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plldf = (scmr & SCMR_PLLDF) ? 1 : 0;
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gd->vco_out = (clkin * 2 * (pllmf + 1)) / (plldf + 1);
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}
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#if 0
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if (gd->vco_out / (busdf + 1) != clkin) {
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/* aaarrrggghhh!!! */
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return (1);
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}
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#endif
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gd->cpm_clk = gd->vco_out / 2;
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gd->bus_clk = clkin;
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gd->scc_clk = gd->vco_out / 4;
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gd->brg_clk = gd->vco_out / (1 << (2 * (dfbrg + 1)));
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if (cp->b2c_mult > 0) {
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gd->cpu_clk = (clkin * cp->b2c_mult) / 2;
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} else {
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gd->cpu_clk = clkin;
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}
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#ifdef CONFIG_PCI
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gd->pci_clk = clkin;
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if (sccr & SCCR_PCI_MODE) {
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uint pci_div;
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uint pcidf = (sccr & SCCR_PCIDF_MSK) >> SCCR_PCIDF_SHIFT;
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if (sccr & SCCR_PCI_MODCK) {
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pci_div = 2;
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if (pcidf == 9) {
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pci_div *= 5;
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} else if (pcidf == 0xB) {
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pci_div *= 6;
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} else {
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pci_div *= (pcidf + 1);
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}
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} else {
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pci_div = pcidf + 1;
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}
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gd->pci_clk = (gd->cpm_clk * 2) / pci_div;
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}
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#endif
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return (0);
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}
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int prt_8260_clks (void)
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{
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volatile immap_t *immap = (immap_t *) CONFIG_SYS_IMMR;
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ulong sccr, dfbrg;
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ulong scmr, corecnf, busdf, cpmdf, plldf, pllmf, pcidf;
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corecnf_t *cp;
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sccr = immap->im_clkrst.car_sccr;
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dfbrg = (sccr & SCCR_DFBRG_MSK) >> SCCR_DFBRG_SHIFT;
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scmr = immap->im_clkrst.car_scmr;
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corecnf = (scmr & SCMR_CORECNF_MSK) >> SCMR_CORECNF_SHIFT;
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busdf = (scmr & SCMR_BUSDF_MSK) >> SCMR_BUSDF_SHIFT;
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cpmdf = (scmr & SCMR_CPMDF_MSK) >> SCMR_CPMDF_SHIFT;
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plldf = (scmr & SCMR_PLLDF) ? 1 : 0;
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pllmf = (scmr & SCMR_PLLMF_MSK) >> SCMR_PLLMF_SHIFT;
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pcidf = (sccr & SCCR_PCIDF_MSK) >> SCCR_PCIDF_SHIFT;
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cp = &corecnf_tab[corecnf];
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puts (CPU_ID_STR " Clock Configuration\n - Bus-to-Core Mult ");
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switch (cp->b2c_mult) {
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case _byp:
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puts ("BYPASS");
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break;
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case _off:
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puts ("OFF");
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break;
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case _unk:
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puts ("UNKNOWN");
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break;
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default:
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printf ("%d%sx",
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cp->b2c_mult / 2,
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(cp->b2c_mult % 2) ? ".5" : "");
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break;
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}
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printf (", VCO Div %d, 60x Bus Freq %s, Core Freq %s\n",
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cp->vco_div, cp->freq_60x, cp->freq_core);
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printf (" - dfbrg %ld, corecnf 0x%02lx, busdf %ld, cpmdf %ld, "
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"plldf %ld, pllmf %ld, pcidf %ld\n",
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dfbrg, corecnf, busdf, cpmdf,
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plldf, pllmf, pcidf);
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printf (" - vco_out %10ld, scc_clk %10ld, brg_clk %10ld\n",
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gd->vco_out, gd->scc_clk, gd->brg_clk);
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printf (" - cpu_clk %10ld, cpm_clk %10ld, bus_clk %10ld\n",
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gd->cpu_clk, gd->cpm_clk, gd->bus_clk);
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#ifdef CONFIG_PCI
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printf (" - pci_clk %10ld\n", gd->pci_clk);
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#endif
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putc ('\n');
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return (0);
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}
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