upstream u-boot with additional patches for our devices/boards:
https://lists.denx.de/pipermail/u-boot/2017-March/282789.html (AXP crashes) ;
Gbit ethernet patch for some LIME2 revisions ;
with SPI flash support
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85 lines
2.0 KiB
85 lines
2.0 KiB
/*
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* (C) Copyright 2013-2014
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* NVIDIA Corporation <www.nvidia.com>
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*
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* SPDX-License-Identifier: GPL-2.0
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <linux/sizes.h>
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/* enable PMIC */
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#define CONFIG_AS3722_POWER
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#include "tegra124-common.h"
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/* High-level configuration options */
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#define V_PROMPT "Tegra124 (Jetson TK1) # "
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#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Jetson TK1"
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/* Board-specific serial config */
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#define CONFIG_SERIAL_MULTI
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#define CONFIG_TEGRA_ENABLE_UARTD
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#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
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/* I2C */
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#define CONFIG_SYS_I2C_TEGRA
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#define CONFIG_CMD_I2C
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/* SD/MMC */
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#define CONFIG_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_TEGRA_MMC
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#define CONFIG_CMD_MMC
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/* Environment in eMMC, at the end of 2nd "boot sector" */
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#define CONFIG_ENV_IS_IN_MMC
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#define CONFIG_ENV_OFFSET (-CONFIG_ENV_SIZE)
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#define CONFIG_SYS_MMC_ENV_PART 2
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/* SPI */
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#define CONFIG_TEGRA114_SPI /* Compatible w/ Tegra114 SPI */
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#define CONFIG_TEGRA114_SPI_CTRLS 6
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#define CONFIG_SPI_FLASH_WINBOND
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#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
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#define CONFIG_SF_DEFAULT_SPEED 24000000
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#define CONFIG_CMD_SPI
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#define CONFIG_CMD_SF
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#define CONFIG_SPI_FLASH_SIZE (4 << 20)
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/* USB Host support */
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#define CONFIG_USB_EHCI
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#define CONFIG_USB_EHCI_TEGRA
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#define CONFIG_USB_STORAGE
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#define CONFIG_CMD_USB
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/* USB networking support */
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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/* PCI host support */
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#define CONFIG_PCI
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#define CONFIG_PCI_TEGRA
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#define CONFIG_PCI_PNP
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#define CONFIG_CMD_PCI
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#define CONFIG_CMD_PCI_ENUM
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/* PCI networking support */
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#define CONFIG_RTL8169
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/* General networking support */
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#define CONFIG_CMD_DHCP
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#include "tegra-common-usb-gadget.h"
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#include "tegra-common-post.h"
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#define CONFIG_ARMV7_PSCI 1
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/* Reserve top 1M for secure RAM */
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#define CONFIG_ARMV7_SECURE_BASE 0xfff00000
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#define CONFIG_ARMV7_SECURE_RESERVE_SIZE 0x00100000
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#endif /* __CONFIG_H */
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